1*8ece5ef6SSugar Zhang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*8ece5ef6SSugar Zhang%YAML 1.2
3*8ece5ef6SSugar Zhang---
4*8ece5ef6SSugar Zhang$id: http://devicetree.org/schemas/sound/rockchip,pdm.yaml#
5*8ece5ef6SSugar Zhang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*8ece5ef6SSugar Zhang
7*8ece5ef6SSugar Zhangtitle: Rockchip PDM controller
8*8ece5ef6SSugar Zhang
9*8ece5ef6SSugar Zhangdescription:
10*8ece5ef6SSugar Zhang  The Pulse Density Modulation Interface Controller (PDMC) is
11*8ece5ef6SSugar Zhang  a PDM interface controller and decoder that support PDM format.
12*8ece5ef6SSugar Zhang  It integrates a clock generator driving the PDM microphone
13*8ece5ef6SSugar Zhang  and embeds filters which decimate the incoming bit stream to
14*8ece5ef6SSugar Zhang  obtain most common audio rates.
15*8ece5ef6SSugar Zhang
16*8ece5ef6SSugar Zhangmaintainers:
17*8ece5ef6SSugar Zhang  - Heiko Stuebner <heiko@sntech.de>
18*8ece5ef6SSugar Zhang
19*8ece5ef6SSugar Zhangproperties:
20*8ece5ef6SSugar Zhang  compatible:
21*8ece5ef6SSugar Zhang    enum:
22*8ece5ef6SSugar Zhang      - rockchip,pdm
23*8ece5ef6SSugar Zhang      - rockchip,px30-pdm
24*8ece5ef6SSugar Zhang      - rockchip,rk1808-pdm
25*8ece5ef6SSugar Zhang      - rockchip,rk3308-pdm
26*8ece5ef6SSugar Zhang      - rockchip,rk3568-pdm
27*8ece5ef6SSugar Zhang      - rockchip,rv1126-pdm
28*8ece5ef6SSugar Zhang
29*8ece5ef6SSugar Zhang  reg:
30*8ece5ef6SSugar Zhang    maxItems: 1
31*8ece5ef6SSugar Zhang
32*8ece5ef6SSugar Zhang  interrupts:
33*8ece5ef6SSugar Zhang    maxItems: 1
34*8ece5ef6SSugar Zhang
35*8ece5ef6SSugar Zhang  clocks:
36*8ece5ef6SSugar Zhang    items:
37*8ece5ef6SSugar Zhang      - description: clock for PDM controller
38*8ece5ef6SSugar Zhang      - description: clock for PDM BUS
39*8ece5ef6SSugar Zhang
40*8ece5ef6SSugar Zhang  clock-names:
41*8ece5ef6SSugar Zhang    items:
42*8ece5ef6SSugar Zhang      - const: pdm_clk
43*8ece5ef6SSugar Zhang      - const: pdm_hclk
44*8ece5ef6SSugar Zhang
45*8ece5ef6SSugar Zhang  dmas:
46*8ece5ef6SSugar Zhang    maxItems: 1
47*8ece5ef6SSugar Zhang
48*8ece5ef6SSugar Zhang  dma-names:
49*8ece5ef6SSugar Zhang    items:
50*8ece5ef6SSugar Zhang      - const: rx
51*8ece5ef6SSugar Zhang
52*8ece5ef6SSugar Zhang  power-domains:
53*8ece5ef6SSugar Zhang    maxItems: 1
54*8ece5ef6SSugar Zhang
55*8ece5ef6SSugar Zhang  resets:
56*8ece5ef6SSugar Zhang    items:
57*8ece5ef6SSugar Zhang      - description: reset for PDM controller
58*8ece5ef6SSugar Zhang
59*8ece5ef6SSugar Zhang  reset-names:
60*8ece5ef6SSugar Zhang    items:
61*8ece5ef6SSugar Zhang      - const: pdm-m
62*8ece5ef6SSugar Zhang
63*8ece5ef6SSugar Zhang  rockchip,path-map:
64*8ece5ef6SSugar Zhang    $ref: /schemas/types.yaml#/definitions/uint32-array
65*8ece5ef6SSugar Zhang    description:
66*8ece5ef6SSugar Zhang      Defines the mapping of PDM SDIx to PDM PATHx.
67*8ece5ef6SSugar Zhang      By default, they are mapped one-to-one.
68*8ece5ef6SSugar Zhang    maxItems: 4
69*8ece5ef6SSugar Zhang    uniqueItems: true
70*8ece5ef6SSugar Zhang    items:
71*8ece5ef6SSugar Zhang      enum: [ 0, 1, 2, 3 ]
72*8ece5ef6SSugar Zhang
73*8ece5ef6SSugar Zhang  "#sound-dai-cells":
74*8ece5ef6SSugar Zhang    const: 0
75*8ece5ef6SSugar Zhang
76*8ece5ef6SSugar Zhangrequired:
77*8ece5ef6SSugar Zhang  - compatible
78*8ece5ef6SSugar Zhang  - reg
79*8ece5ef6SSugar Zhang  - interrupts
80*8ece5ef6SSugar Zhang  - clocks
81*8ece5ef6SSugar Zhang  - clock-names
82*8ece5ef6SSugar Zhang  - dmas
83*8ece5ef6SSugar Zhang  - dma-names
84*8ece5ef6SSugar Zhang  - "#sound-dai-cells"
85*8ece5ef6SSugar Zhang
86*8ece5ef6SSugar ZhangadditionalProperties: false
87*8ece5ef6SSugar Zhang
88*8ece5ef6SSugar Zhangexamples:
89*8ece5ef6SSugar Zhang  - |
90*8ece5ef6SSugar Zhang    #include <dt-bindings/clock/rk3328-cru.h>
91*8ece5ef6SSugar Zhang    #include <dt-bindings/interrupt-controller/arm-gic.h>
92*8ece5ef6SSugar Zhang    #include <dt-bindings/interrupt-controller/irq.h>
93*8ece5ef6SSugar Zhang    #include <dt-bindings/pinctrl/rockchip.h>
94*8ece5ef6SSugar Zhang
95*8ece5ef6SSugar Zhang    bus {
96*8ece5ef6SSugar Zhang        #address-cells = <2>;
97*8ece5ef6SSugar Zhang        #size-cells = <2>;
98*8ece5ef6SSugar Zhang
99*8ece5ef6SSugar Zhang        pdm@ff040000 {
100*8ece5ef6SSugar Zhang            compatible = "rockchip,pdm";
101*8ece5ef6SSugar Zhang            reg = <0x0 0xff040000 0x0 0x1000>;
102*8ece5ef6SSugar Zhang            interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
103*8ece5ef6SSugar Zhang            clocks = <&cru SCLK_PDM>, <&cru HCLK_PDM>;
104*8ece5ef6SSugar Zhang            clock-names = "pdm_clk", "pdm_hclk";
105*8ece5ef6SSugar Zhang            dmas = <&dmac 16>;
106*8ece5ef6SSugar Zhang            dma-names = "rx";
107*8ece5ef6SSugar Zhang            #sound-dai-cells = <0>;
108*8ece5ef6SSugar Zhang            pinctrl-names = "default", "sleep";
109*8ece5ef6SSugar Zhang            pinctrl-0 = <&pdmm0_clk
110*8ece5ef6SSugar Zhang                         &pdmm0_sdi0
111*8ece5ef6SSugar Zhang                         &pdmm0_sdi1
112*8ece5ef6SSugar Zhang                         &pdmm0_sdi2
113*8ece5ef6SSugar Zhang                         &pdmm0_sdi3>;
114*8ece5ef6SSugar Zhang            pinctrl-1 = <&pdmm0_clk_sleep
115*8ece5ef6SSugar Zhang                         &pdmm0_sdi0_sleep
116*8ece5ef6SSugar Zhang                         &pdmm0_sdi1_sleep
117*8ece5ef6SSugar Zhang                         &pdmm0_sdi2_sleep
118*8ece5ef6SSugar Zhang                         &pdmm0_sdi3_sleep>;
119*8ece5ef6SSugar Zhang        };
120*8ece5ef6SSugar Zhang    };
121