1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NVIDIA Tegra HDA controller 8 9description: | 10 The High Definition Audio (HDA) block provides a serial interface to 11 audio codec. It supports multiple input and output streams. 12 13maintainers: 14 - Thierry Reding <treding@nvidia.com> 15 - Jon Hunter <jonathanh@nvidia.com> 16 17properties: 18 $nodename: 19 pattern: "^hda@[0-9a-f]*$" 20 21 compatible: 22 oneOf: 23 - const: nvidia,tegra30-hda 24 - items: 25 - enum: 26 - nvidia,tegra234-hda 27 - nvidia,tegra194-hda 28 - nvidia,tegra186-hda 29 - nvidia,tegra210-hda 30 - nvidia,tegra124-hda 31 - const: nvidia,tegra30-hda 32 - items: 33 - const: nvidia,tegra132-hda 34 - const: nvidia,tegra124-hda 35 - const: nvidia,tegra30-hda 36 37 reg: 38 maxItems: 1 39 40 interrupts: 41 description: The interrupt from the HDA controller 42 maxItems: 1 43 44 clocks: 45 minItems: 2 46 maxItems: 3 47 48 clock-names: 49 minItems: 2 50 items: 51 - const: hda 52 - const: hda2hdmi 53 - const: hda2codec_2x 54 55 resets: 56 minItems: 2 57 maxItems: 3 58 59 reset-names: 60 minItems: 2 61 items: 62 - const: hda 63 - const: hda2hdmi 64 - const: hda2codec_2x 65 66 power-domains: 67 maxItems: 1 68 69 interconnects: 70 maxItems: 2 71 72 interconnect-names: 73 items: 74 - const: dma-mem 75 - const: write 76 77 iommus: 78 maxItems: 1 79 80 nvidia,model: 81 $ref: /schemas/types.yaml#/definitions/string 82 description: | 83 The user-visible name of this sound complex. If this property is 84 not specified then boards can use default name provided in hda driver. 85 86required: 87 - compatible 88 - reg 89 - interrupts 90 - clocks 91 - clock-names 92 93additionalProperties: false 94 95examples: 96 - | 97 #include<dt-bindings/clock/tegra124-car-common.h> 98 #include<dt-bindings/interrupt-controller/arm-gic.h> 99 100 hda@70030000 { 101 compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda"; 102 reg = <0x70030000 0x10000>; 103 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 104 clocks = <&tegra_car TEGRA124_CLK_HDA>, 105 <&tegra_car TEGRA124_CLK_HDA2HDMI>, 106 <&tegra_car TEGRA124_CLK_HDA2CODEC_2X>; 107 clock-names = "hda", "hda2hdmi", "hda2codec_2x"; 108 resets = <&tegra_car 125>, /* hda */ 109 <&tegra_car 128>, /* hda2hdmi */ 110 <&tegra_car 111>; /* hda2codec_2x */ 111 reset-names = "hda", "hda2hdmi", "hda2codec_2x"; 112 nvidia,model = "jetson-tk1-hda"; 113 }; 114 115... 116