1NVIDIA Tegra30 AHUB (Audio Hub) 2 3Required properties: 4- compatible : "nvidia,tegra30-ahub", "nvidia,tegra114-ahub", etc. 5- reg : Should contain the register physical address and length for each of 6 the AHUB's register blocks. 7 - Tegra30 requires 2 entries, for the APBIF and AHUB/AUDIO register blocks. 8 - Tegra114 requires an additional entry, for the APBIF2 register block. 9- interrupts : Should contain AHUB interrupt 10- clocks : Must contain an entry for each entry in clock-names. 11 See ../clocks/clock-bindings.txt for details. 12- clock-names : Must include the following entries: 13 - d_audio 14 - apbif 15- resets : Must contain an entry for each entry in reset-names. 16 See ../reset/reset.txt for details. 17- reset-names : Must include the following entries: 18 Tegra30 and later: 19 - d_audio 20 - apbif 21 - i2s0 22 - i2s1 23 - i2s2 24 - i2s3 25 - i2s4 26 - dam0 27 - dam1 28 - dam2 29 - spdif 30 Tegra114 and later additionally require: 31 - amx 32 - adx 33 Tegra124 and later additionally require: 34 - amx1 35 - adx1 36 - afc0 37 - afc1 38 - afc2 39 - afc3 40 - afc4 41 - afc5 42- ranges : The bus address mapping for the configlink register bus. 43 Can be empty since the mapping is 1:1. 44- dmas : Must contain an entry for each entry in clock-names. 45 See ../dma/dma.txt for details. 46- dma-names : Must include the following entries: 47 - rx0 .. rx<n> 48 - tx0 .. tx<n> 49 ... where n is: 50 Tegra30: 3 51 Tegra114, Tegra124: 9 52- #address-cells : For the configlink bus. Should be <1>; 53- #size-cells : For the configlink bus. Should be <1>. 54 55AHUB client modules need to specify the IDs of their CIFs (Client InterFaces). 56For RX CIFs, the numbers indicate the register number within AHUB routing 57register space (APBIF 0..3 RX, I2S 0..5 RX, DAM 0..2 RX 0..1, SPDIF RX 0..1). 58For TX CIFs, the numbers indicate the bit position within the AHUB routing 59registers (APBIF 0..3 TX, I2S 0..5 TX, DAM 0..2 TX, SPDIF TX 0..1). 60 61Example: 62 63ahub@70080000 { 64 compatible = "nvidia,tegra30-ahub"; 65 reg = <0x70080000 0x200 0x70080200 0x100>; 66 interrupts = < 0 103 0x04 >; 67 nvidia,dma-request-selector = <&apbdma 1>; 68 clocks = <&tegra_car 106>, <&tegra_car 107>; 69 clock-names = "d_audio", "apbif"; 70 resets = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>, 71 <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>, 72 <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>, 73 <&tegra_car 110>, <&tegra_car 10>; 74 reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2", 75 "i2s3", "i2s4", "dam0", "dam1", "dam2", 76 "spdif"; 77 dmas = <&apbdma 1>, <&apbdma 1>; 78 <&apbdma 2>, <&apbdma 2>; 79 <&apbdma 3>, <&apbdma 3>; 80 <&apbdma 4>, <&apbdma 4>; 81 dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3"; 82 ranges; 83 #address-cells = <1>; 84 #size-cells = <1>; 85}; 86