1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Tegra210 AHUB Device Tree Bindings
8
9description: |
10  The Audio Hub (AHUB) comprises a collection of hardware accelerators
11  for audio pre-processing, post-processing and a programmable full
12  crossbar for routing audio data across these accelerators. It has
13  external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA
14  engine through ADMAIF.
15
16maintainers:
17  - Jon Hunter <jonathanh@nvidia.com>
18  - Sameer Pujar <spujar@nvidia.com>
19
20properties:
21  $nodename:
22    pattern: "^ahub@[0-9a-f]*$"
23
24  compatible:
25    oneOf:
26      - enum:
27          - nvidia,tegra210-ahub
28          - nvidia,tegra186-ahub
29      - items:
30          - const: nvidia,tegra194-ahub
31          - const: nvidia,tegra186-ahub
32
33  reg:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39  clock-names:
40    const: ahub
41
42  assigned-clocks:
43    maxItems: 1
44
45  assigned-clock-parents:
46    maxItems: 1
47
48  assigned-clock-rates:
49    maxItems: 1
50
51  "#address-cells":
52    const: 1
53
54  "#size-cells":
55    const: 1
56
57  ranges: true
58
59  ports:
60    $ref: /schemas/graph.yaml#/properties/ports
61    description: |
62      Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub).
63      These are connected to ACIF interfaces of AHUB clients. Thus the
64      number of port nodes depend on the number of clients that AHUB may
65      have depending on the SoC revision.
66
67    patternProperties:
68      '^port@[0-9]':
69        $ref: audio-graph-port.yaml#
70        unevaluatedProperties: false
71
72patternProperties:
73  '^i2s@[0-9a-f]+$':
74    type: object
75
76  '^dmic@[0-9a-f]+$':
77    type: object
78    $ref: nvidia,tegra210-dmic.yaml#
79
80  '^admaif@[0-9a-f]+$':
81    type: object
82    $ref: nvidia,tegra210-admaif.yaml#
83
84  '^dspk@[0-9a-f]+$':
85    type: object
86    $ref: nvidia,tegra186-dspk.yaml#
87
88required:
89  - compatible
90  - reg
91  - clocks
92  - clock-names
93  - assigned-clocks
94  - assigned-clock-parents
95  - "#address-cells"
96  - "#size-cells"
97  - ranges
98
99additionalProperties: false
100
101examples:
102  - |
103    #include<dt-bindings/clock/tegra210-car.h>
104
105    ahub@702d0800 {
106        compatible = "nvidia,tegra210-ahub";
107        reg = <0x702d0800 0x800>;
108        clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
109        clock-names = "ahub";
110        assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>;
111        assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
112        #address-cells = <1>;
113        #size-cells = <1>;
114        ranges = <0x702d0000 0x702d0000 0x0000e400>;
115
116        // All AHUB child nodes below
117        admaif@702d0000 {
118            compatible = "nvidia,tegra210-admaif";
119            reg = <0x702d0000 0x800>;
120            dmas = <&adma 1>,  <&adma 1>,
121               <&adma 2>,  <&adma 2>,
122               <&adma 3>,  <&adma 3>,
123               <&adma 4>,  <&adma 4>,
124               <&adma 5>,  <&adma 5>,
125               <&adma 6>,  <&adma 6>,
126               <&adma 7>,  <&adma 7>,
127               <&adma 8>,  <&adma 8>,
128               <&adma 9>,  <&adma 9>,
129               <&adma 10>, <&adma 10>;
130            dma-names = "rx1",  "tx1",
131                    "rx2",  "tx2",
132                    "rx3",  "tx3",
133                    "rx4",  "tx4",
134                    "rx5",  "tx5",
135                    "rx6",  "tx6",
136                    "rx7",  "tx7",
137                    "rx8",  "tx8",
138                    "rx9",  "tx9",
139                    "rx10", "tx10";
140        };
141
142        i2s@702d1000 {
143            compatible = "nvidia,tegra210-i2s";
144            reg = <0x702d1000 0x100>;
145            clocks = <&tegra_car TEGRA210_CLK_I2S0>;
146            clock-names = "i2s";
147            assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>;
148            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
149            assigned-clock-rates = <1536000>;
150            sound-name-prefix = "I2S1";
151        };
152
153        dmic@702d4000 {
154            compatible = "nvidia,tegra210-dmic";
155            reg = <0x702d4000 0x100>;
156            clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
157            clock-names = "dmic";
158            assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>;
159            assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>;
160            assigned-clock-rates = <3072000>;
161            sound-name-prefix = "DMIC1";
162        };
163
164        // More child nodes to follow
165    };
166
167...
168