1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Tegra210 AHUB Device Tree Bindings 8 9description: | 10 The Audio Hub (AHUB) comprises a collection of hardware accelerators 11 for audio pre-processing, post-processing and a programmable full 12 crossbar for routing audio data across these accelerators. It has 13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA 14 engine through ADMAIF. 15 16maintainers: 17 - Jon Hunter <jonathanh@nvidia.com> 18 - Sameer Pujar <spujar@nvidia.com> 19 20properties: 21 $nodename: 22 pattern: "^ahub@[0-9a-f]*$" 23 24 compatible: 25 oneOf: 26 - enum: 27 - nvidia,tegra210-ahub 28 - nvidia,tegra186-ahub 29 - items: 30 - const: nvidia,tegra194-ahub 31 - const: nvidia,tegra186-ahub 32 33 reg: 34 maxItems: 1 35 36 clocks: 37 maxItems: 1 38 39 clock-names: 40 const: ahub 41 42 assigned-clocks: 43 maxItems: 1 44 45 assigned-clock-parents: 46 maxItems: 1 47 48 assigned-clock-rates: 49 maxItems: 1 50 51 "#address-cells": 52 const: 1 53 54 "#size-cells": 55 const: 1 56 57 ranges: true 58 59 ports: 60 $ref: /schemas/graph.yaml#/properties/ports 61 description: | 62 Contains list of ACIF (Audio CIF) port nodes for AHUB (Audio Hub). 63 These are connected to ACIF interfaces of AHUB clients. Thus the 64 number of port nodes depend on the number of clients that AHUB may 65 have depending on the SoC revision. 66 67 patternProperties: 68 '^port@[0-9]': 69 $ref: audio-graph-port.yaml# 70 unevaluatedProperties: false 71 72patternProperties: 73 '^i2s@[0-9a-f]+$': 74 type: object 75 76 '^dmic@[0-9a-f]+$': 77 type: object 78 $ref: nvidia,tegra210-dmic.yaml# 79 80 '^admaif@[0-9a-f]+$': 81 type: object 82 $ref: nvidia,tegra210-admaif.yaml# 83 84 '^dspk@[0-9a-f]+$': 85 type: object 86 $ref: nvidia,tegra186-dspk.yaml# 87 88 '^mvc@[0-9a-f]+$': 89 type: object 90 $ref: nvidia,tegra210-mvc.yaml# 91 92 '^sfc@[0-9a-f]+$': 93 type: object 94 $ref: nvidia,tegra210-sfc.yaml# 95 96 '^amx@[0-9a-f]+$': 97 type: object 98 $ref: nvidia,tegra210-amx.yaml# 99 100 '^adx@[0-9a-f]+$': 101 type: object 102 $ref: nvidia,tegra210-adx.yaml# 103 104 '^amixer@[0-9a-f]+$': 105 type: object 106 $ref: nvidia,tegra210-mixer.yaml# 107 108required: 109 - compatible 110 - reg 111 - clocks 112 - clock-names 113 - assigned-clocks 114 - assigned-clock-parents 115 - "#address-cells" 116 - "#size-cells" 117 - ranges 118 119additionalProperties: false 120 121examples: 122 - | 123 #include<dt-bindings/clock/tegra210-car.h> 124 125 ahub@702d0800 { 126 compatible = "nvidia,tegra210-ahub"; 127 reg = <0x702d0800 0x800>; 128 clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 129 clock-names = "ahub"; 130 assigned-clocks = <&tegra_car TEGRA210_CLK_D_AUDIO>; 131 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 132 #address-cells = <1>; 133 #size-cells = <1>; 134 ranges = <0x702d0000 0x702d0000 0x0000e400>; 135 136 // All AHUB child nodes below 137 admaif@702d0000 { 138 compatible = "nvidia,tegra210-admaif"; 139 reg = <0x702d0000 0x800>; 140 dmas = <&adma 1>, <&adma 1>, 141 <&adma 2>, <&adma 2>, 142 <&adma 3>, <&adma 3>, 143 <&adma 4>, <&adma 4>, 144 <&adma 5>, <&adma 5>, 145 <&adma 6>, <&adma 6>, 146 <&adma 7>, <&adma 7>, 147 <&adma 8>, <&adma 8>, 148 <&adma 9>, <&adma 9>, 149 <&adma 10>, <&adma 10>; 150 dma-names = "rx1", "tx1", 151 "rx2", "tx2", 152 "rx3", "tx3", 153 "rx4", "tx4", 154 "rx5", "tx5", 155 "rx6", "tx6", 156 "rx7", "tx7", 157 "rx8", "tx8", 158 "rx9", "tx9", 159 "rx10", "tx10"; 160 }; 161 162 i2s@702d1000 { 163 compatible = "nvidia,tegra210-i2s"; 164 reg = <0x702d1000 0x100>; 165 clocks = <&tegra_car TEGRA210_CLK_I2S0>; 166 clock-names = "i2s"; 167 assigned-clocks = <&tegra_car TEGRA210_CLK_I2S0>; 168 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 169 assigned-clock-rates = <1536000>; 170 sound-name-prefix = "I2S1"; 171 }; 172 173 dmic@702d4000 { 174 compatible = "nvidia,tegra210-dmic"; 175 reg = <0x702d4000 0x100>; 176 clocks = <&tegra_car TEGRA210_CLK_DMIC1>; 177 clock-names = "dmic"; 178 assigned-clocks = <&tegra_car TEGRA210_CLK_DMIC1>; 179 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_A_OUT0>; 180 assigned-clock-rates = <3072000>; 181 sound-name-prefix = "DMIC1"; 182 }; 183 184 // More child nodes to follow 185 }; 186 187... 188