xref: /openbmc/linux/Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml (revision de8c12110a130337c8e7e7b8250de0580e644dee) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra210-admaif.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Tegra210 ADMAIF Device Tree Bindings
8
9description: |
10  ADMAIF is the interface between ADMA and AHUB. Each ADMA channel
11  that sends/receives data to/from AHUB must interface through an
12  ADMAIF channel. ADMA channel sending data to AHUB pairs with ADMAIF
13  Tx channel and ADMA channel receiving data from AHUB pairs with
14  ADMAIF Rx channel.
15
16maintainers:
17  - Jon Hunter <jonathanh@nvidia.com>
18  - Sameer Pujar <spujar@nvidia.com>
19
20allOf:
21  - $ref: audio-graph-port.yaml#
22
23properties:
24  $nodename:
25    pattern: "^admaif@[0-9a-f]*$"
26
27  compatible:
28    oneOf:
29      - enum:
30          - nvidia,tegra210-admaif
31          - nvidia,tegra186-admaif
32      - items:
33          - const: nvidia,tegra194-admaif
34          - const: nvidia,tegra186-admaif
35
36  reg:
37    maxItems: 1
38
39  dmas: true
40
41  dma-names: true
42
43  ports:
44    description: |
45      Contains list of ACIF (Audio CIF) port nodes for ADMAIF channels.
46      The number of port nodes depends on the number of ADMAIF channels
47      that SoC may have. These are interfaced with respective ACIF ports
48      in AHUB (Audio Hub). Each port is capable of data transfers in
49      both directions.
50
51if:
52  properties:
53    compatible:
54      contains:
55        const: nvidia,tegra210-admaif
56
57then:
58  properties:
59    dmas:
60      description:
61        DMA channel specifiers, equally divided for Tx and Rx.
62      minItems: 1
63      maxItems: 20
64    dma-names:
65      items:
66        pattern: "^[rt]x(10|[1-9])$"
67      description:
68        Should be "rx1", "rx2" ... "rx10" for DMA Rx channel
69        Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
70      minItems: 1
71      maxItems: 20
72
73else:
74  properties:
75    dmas:
76      description:
77        DMA channel specifiers, equally divided for Tx and Rx.
78      minItems: 1
79      maxItems: 40
80    dma-names:
81      items:
82        pattern: "^[rt]x(1[0-9]|[1-9]|20)$"
83      description:
84        Should be "rx1", "rx2" ... "rx20" for DMA Rx channel
85        Should be "tx1", "tx2" ... "tx20" for DMA Tx channel
86      minItems: 1
87      maxItems: 40
88
89required:
90  - compatible
91  - reg
92  - dmas
93  - dma-names
94
95unevaluatedProperties: false
96
97examples:
98  - |
99    admaif@702d0000 {
100        compatible = "nvidia,tegra210-admaif";
101        reg = <0x702d0000 0x800>;
102        dmas = <&adma 1>,  <&adma 1>,
103               <&adma 2>,  <&adma 2>,
104               <&adma 3>,  <&adma 3>,
105               <&adma 4>,  <&adma 4>,
106               <&adma 5>,  <&adma 5>,
107               <&adma 6>,  <&adma 6>,
108               <&adma 7>,  <&adma 7>,
109               <&adma 8>,  <&adma 8>,
110               <&adma 9>,  <&adma 9>,
111               <&adma 10>, <&adma 10>;
112        dma-names = "rx1",  "tx1",
113                    "rx2",  "tx2",
114                    "rx3",  "tx3",
115                    "rx4",  "tx4",
116                    "rx5",  "tx5",
117                    "rx6",  "tx6",
118                    "rx7",  "tx7",
119                    "rx8",  "tx8",
120                    "rx9",  "tx9",
121                    "rx10", "tx10";
122    };
123
124...
125