1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-wm8753.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra audio complex with WM8753 CODEC
8
9maintainers:
10  - Jon Hunter <jonathanh@nvidia.com>
11  - Thierry Reding <thierry.reding@gmail.com>
12
13allOf:
14  - $ref: nvidia,tegra-audio-common.yaml#
15
16properties:
17  compatible:
18    items:
19      - pattern: '^[a-z0-9]+,tegra-audio-wm8753(-[a-z0-9]+)+$'
20      - const: nvidia,tegra-audio-wm8753
21
22  nvidia,audio-routing:
23    $ref: /schemas/types.yaml#/definitions/non-unique-string-array
24    description: |
25      A list of the connections between audio components.
26      Each entry is a pair of strings, the first being the connection's sink,
27      the second being the connection's source. Valid names for sources and
28      sinks are the pins (documented in the binding document),
29      and the jacks on the board.
30    minItems: 2
31    items:
32      enum:
33        # Board Connectors
34        - "Headphone Jack"
35        - "Mic Jack"
36
37        # CODEC Pins
38        - LOUT1
39        - LOUT2
40        - ROUT1
41        - ROUT2
42        - MONO1
43        - MONO2
44        - OUT3
45        - OUT4
46        - LINE1
47        - LINE2
48        - RXP
49        - RXN
50        - ACIN
51        - ACOP
52        - MIC1N
53        - MIC1
54        - MIC2N
55        - MIC2
56        - "Mic Bias"
57
58required:
59  - nvidia,i2s-controller
60
61unevaluatedProperties: false
62
63examples:
64  - |
65    sound {
66        compatible = "nvidia,tegra-audio-wm8753-whistler",
67                     "nvidia,tegra-audio-wm8753";
68        nvidia,model = "tegra-wm8753-harmony";
69
70        nvidia,audio-routing =
71                "Headphone Jack", "LOUT1",
72                "Headphone Jack", "ROUT1";
73
74        nvidia,i2s-controller = <&i2s1>;
75        nvidia,audio-codec = <&wm8753>;
76
77        clocks = <&clk 112>, <&clk 113>, <&clk 93>;
78        clock-names = "pll_a", "pll_a_out0", "mclk";
79    };
80