1*344afef6SJiaxin Yu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*344afef6SJiaxin Yu%YAML 1.2 3*344afef6SJiaxin Yu--- 4*344afef6SJiaxin Yu$id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml# 5*344afef6SJiaxin Yu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*344afef6SJiaxin Yu 7*344afef6SJiaxin Yutitle: Mediatek AFE PCM controller for mt8186 8*344afef6SJiaxin Yu 9*344afef6SJiaxin Yumaintainers: 10*344afef6SJiaxin Yu - Jiaxin Yu <jiaxin.yu@mediatek.com> 11*344afef6SJiaxin Yu 12*344afef6SJiaxin Yuproperties: 13*344afef6SJiaxin Yu compatible: 14*344afef6SJiaxin Yu const: mediatek,mt8186-sound 15*344afef6SJiaxin Yu 16*344afef6SJiaxin Yu reg: 17*344afef6SJiaxin Yu maxItems: 1 18*344afef6SJiaxin Yu 19*344afef6SJiaxin Yu interrupts: 20*344afef6SJiaxin Yu maxItems: 1 21*344afef6SJiaxin Yu 22*344afef6SJiaxin Yu resets: 23*344afef6SJiaxin Yu maxItems: 1 24*344afef6SJiaxin Yu 25*344afef6SJiaxin Yu reset-names: 26*344afef6SJiaxin Yu const: audiosys 27*344afef6SJiaxin Yu 28*344afef6SJiaxin Yu mediatek,apmixedsys: 29*344afef6SJiaxin Yu $ref: "/schemas/types.yaml#/definitions/phandle" 30*344afef6SJiaxin Yu description: The phandle of the mediatek apmixedsys controller 31*344afef6SJiaxin Yu 32*344afef6SJiaxin Yu mediatek,infracfg: 33*344afef6SJiaxin Yu $ref: "/schemas/types.yaml#/definitions/phandle" 34*344afef6SJiaxin Yu description: The phandle of the mediatek infracfg controller 35*344afef6SJiaxin Yu 36*344afef6SJiaxin Yu mediatek,topckgen: 37*344afef6SJiaxin Yu $ref: "/schemas/types.yaml#/definitions/phandle" 38*344afef6SJiaxin Yu description: The phandle of the mediatek topckgen controller 39*344afef6SJiaxin Yu 40*344afef6SJiaxin Yu clocks: 41*344afef6SJiaxin Yu items: 42*344afef6SJiaxin Yu - description: audio infra sys clock 43*344afef6SJiaxin Yu - description: audio infra 26M clock 44*344afef6SJiaxin Yu - description: audio top mux 45*344afef6SJiaxin Yu - description: audio intbus mux 46*344afef6SJiaxin Yu - description: mainpll 136.5M clock 47*344afef6SJiaxin Yu - description: faud1 mux 48*344afef6SJiaxin Yu - description: apll1 clock 49*344afef6SJiaxin Yu - description: faud2 mux 50*344afef6SJiaxin Yu - description: apll2 clock 51*344afef6SJiaxin Yu - description: audio engen1 mux 52*344afef6SJiaxin Yu - description: apll1_d8 22.5792M clock 53*344afef6SJiaxin Yu - description: audio engen2 mux 54*344afef6SJiaxin Yu - description: apll2_d8 24.576M clock 55*344afef6SJiaxin Yu - description: i2s0 mclk mux 56*344afef6SJiaxin Yu - description: i2s1 mclk mux 57*344afef6SJiaxin Yu - description: i2s2 mclk mux 58*344afef6SJiaxin Yu - description: i2s4 mclk mux 59*344afef6SJiaxin Yu - description: tdm mclk mux 60*344afef6SJiaxin Yu - description: i2s0_mck divider 61*344afef6SJiaxin Yu - description: i2s1_mck divider 62*344afef6SJiaxin Yu - description: i2s2_mck divider 63*344afef6SJiaxin Yu - description: i2s4_mck divider 64*344afef6SJiaxin Yu - description: tdm_mck divider 65*344afef6SJiaxin Yu - description: audio hires mux 66*344afef6SJiaxin Yu - description: 26M clock 67*344afef6SJiaxin Yu 68*344afef6SJiaxin Yu clock-names: 69*344afef6SJiaxin Yu items: 70*344afef6SJiaxin Yu - const: aud_infra_clk 71*344afef6SJiaxin Yu - const: mtkaif_26m_clk 72*344afef6SJiaxin Yu - const: top_mux_audio 73*344afef6SJiaxin Yu - const: top_mux_audio_int 74*344afef6SJiaxin Yu - const: top_mainpll_d2_d4 75*344afef6SJiaxin Yu - const: top_mux_aud_1 76*344afef6SJiaxin Yu - const: top_apll1_ck 77*344afef6SJiaxin Yu - const: top_mux_aud_2 78*344afef6SJiaxin Yu - const: top_apll2_ck 79*344afef6SJiaxin Yu - const: top_mux_aud_eng1 80*344afef6SJiaxin Yu - const: top_apll1_d8 81*344afef6SJiaxin Yu - const: top_mux_aud_eng2 82*344afef6SJiaxin Yu - const: top_apll2_d8 83*344afef6SJiaxin Yu - const: top_i2s0_m_sel 84*344afef6SJiaxin Yu - const: top_i2s1_m_sel 85*344afef6SJiaxin Yu - const: top_i2s2_m_sel 86*344afef6SJiaxin Yu - const: top_i2s4_m_sel 87*344afef6SJiaxin Yu - const: top_tdm_m_sel 88*344afef6SJiaxin Yu - const: top_apll12_div0 89*344afef6SJiaxin Yu - const: top_apll12_div1 90*344afef6SJiaxin Yu - const: top_apll12_div2 91*344afef6SJiaxin Yu - const: top_apll12_div4 92*344afef6SJiaxin Yu - const: top_apll12_div_tdm 93*344afef6SJiaxin Yu - const: top_mux_audio_h 94*344afef6SJiaxin Yu - const: top_clk26m_clk 95*344afef6SJiaxin Yu 96*344afef6SJiaxin Yurequired: 97*344afef6SJiaxin Yu - compatible 98*344afef6SJiaxin Yu - interrupts 99*344afef6SJiaxin Yu - resets 100*344afef6SJiaxin Yu - reset-names 101*344afef6SJiaxin Yu - mediatek,apmixedsys 102*344afef6SJiaxin Yu - mediatek,infracfg 103*344afef6SJiaxin Yu - mediatek,topckgen 104*344afef6SJiaxin Yu - clocks 105*344afef6SJiaxin Yu - clock-names 106*344afef6SJiaxin Yu 107*344afef6SJiaxin YuadditionalProperties: false 108*344afef6SJiaxin Yu 109*344afef6SJiaxin Yuexamples: 110*344afef6SJiaxin Yu - | 111*344afef6SJiaxin Yu #include <dt-bindings/interrupt-controller/arm-gic.h> 112*344afef6SJiaxin Yu #include <dt-bindings/interrupt-controller/irq.h> 113*344afef6SJiaxin Yu 114*344afef6SJiaxin Yu afe: mt8186-afe-pcm@11210000 { 115*344afef6SJiaxin Yu compatible = "mediatek,mt8186-sound"; 116*344afef6SJiaxin Yu reg = <0x11210000 0x2000>; 117*344afef6SJiaxin Yu interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; 118*344afef6SJiaxin Yu resets = <&watchdog 17>; //MT8186_TOPRGU_AUDIO_SW_RST 119*344afef6SJiaxin Yu reset-names = "audiosys"; 120*344afef6SJiaxin Yu mediatek,apmixedsys = <&apmixedsys>; 121*344afef6SJiaxin Yu mediatek,infracfg = <&infracfg>; 122*344afef6SJiaxin Yu mediatek,topckgen = <&topckgen>; 123*344afef6SJiaxin Yu clocks = <&infracfg_ao 44>, //CLK_INFRA_AO_AUDIO 124*344afef6SJiaxin Yu <&infracfg_ao 54>, //CLK_INFRA_AO_AUDIO_26M_BCLK 125*344afef6SJiaxin Yu <&topckgen 15>, //CLK_TOP_AUDIO 126*344afef6SJiaxin Yu <&topckgen 16>, //CLK_TOP_AUD_INTBUS 127*344afef6SJiaxin Yu <&topckgen 70>, //CLK_TOP_MAINPLL_D2_D4 128*344afef6SJiaxin Yu <&topckgen 17>, //CLK_TOP_AUD_1 129*344afef6SJiaxin Yu <&apmixedsys 12>, //CLK_APMIXED_APLL1 130*344afef6SJiaxin Yu <&topckgen 18>, //CLK_TOP_AUD_2 131*344afef6SJiaxin Yu <&apmixedsys 13>, //CLK_APMIXED_APLL2 132*344afef6SJiaxin Yu <&topckgen 19>, //CLK_TOP_AUD_ENGEN1 133*344afef6SJiaxin Yu <&topckgen 101>, //CLK_TOP_APLL1_D8 134*344afef6SJiaxin Yu <&topckgen 20>, //CLK_TOP_AUD_ENGEN2 135*344afef6SJiaxin Yu <&topckgen 104>, //CLK_TOP_APLL2_D8 136*344afef6SJiaxin Yu <&topckgen 63>, //CLK_TOP_APLL_I2S0_MCK_SEL 137*344afef6SJiaxin Yu <&topckgen 64>, //CLK_TOP_APLL_I2S1_MCK_SEL 138*344afef6SJiaxin Yu <&topckgen 65>, //CLK_TOP_APLL_I2S2_MCK_SEL 139*344afef6SJiaxin Yu <&topckgen 66>, //CLK_TOP_APLL_I2S4_MCK_SEL 140*344afef6SJiaxin Yu <&topckgen 67>, //CLK_TOP_APLL_TDMOUT_MCK_SEL 141*344afef6SJiaxin Yu <&topckgen 131>, //CLK_TOP_APLL12_CK_DIV0 142*344afef6SJiaxin Yu <&topckgen 132>, //CLK_TOP_APLL12_CK_DIV1 143*344afef6SJiaxin Yu <&topckgen 133>, //CLK_TOP_APLL12_CK_DIV2 144*344afef6SJiaxin Yu <&topckgen 134>, //CLK_TOP_APLL12_CK_DIV4 145*344afef6SJiaxin Yu <&topckgen 135>, //CLK_TOP_APLL12_CK_DIV_TDMOUT_M 146*344afef6SJiaxin Yu <&topckgen 44>, //CLK_TOP_AUDIO_H 147*344afef6SJiaxin Yu <&clk26m>; 148*344afef6SJiaxin Yu clock-names = "aud_infra_clk", 149*344afef6SJiaxin Yu "mtkaif_26m_clk", 150*344afef6SJiaxin Yu "top_mux_audio", 151*344afef6SJiaxin Yu "top_mux_audio_int", 152*344afef6SJiaxin Yu "top_mainpll_d2_d4", 153*344afef6SJiaxin Yu "top_mux_aud_1", 154*344afef6SJiaxin Yu "top_apll1_ck", 155*344afef6SJiaxin Yu "top_mux_aud_2", 156*344afef6SJiaxin Yu "top_apll2_ck", 157*344afef6SJiaxin Yu "top_mux_aud_eng1", 158*344afef6SJiaxin Yu "top_apll1_d8", 159*344afef6SJiaxin Yu "top_mux_aud_eng2", 160*344afef6SJiaxin Yu "top_apll2_d8", 161*344afef6SJiaxin Yu "top_i2s0_m_sel", 162*344afef6SJiaxin Yu "top_i2s1_m_sel", 163*344afef6SJiaxin Yu "top_i2s2_m_sel", 164*344afef6SJiaxin Yu "top_i2s4_m_sel", 165*344afef6SJiaxin Yu "top_tdm_m_sel", 166*344afef6SJiaxin Yu "top_apll12_div0", 167*344afef6SJiaxin Yu "top_apll12_div1", 168*344afef6SJiaxin Yu "top_apll12_div2", 169*344afef6SJiaxin Yu "top_apll12_div4", 170*344afef6SJiaxin Yu "top_apll12_div_tdm", 171*344afef6SJiaxin Yu "top_mux_audio_h", 172*344afef6SJiaxin Yu "top_clk26m_clk"; 173*344afef6SJiaxin Yu }; 174*344afef6SJiaxin Yu 175*344afef6SJiaxin Yu... 176