1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2# Copyright 2020 Intel Corporation
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/sound/intel,keembay-i2s.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Intel KeemBay I2S Device Tree Bindings
9
10maintainers:
11  - Sia, Jee Heng <jee.heng.sia@intel.com>
12
13description: |
14 Intel KeemBay I2S
15
16properties:
17  compatible:
18    enum:
19      - intel,keembay-i2s
20      - intel,keembay-tdm
21
22  "#sound-dai-cells":
23    const: 0
24
25  reg:
26    items:
27      - description: I2S registers
28      - description: I2S gen configuration
29
30  reg-names:
31    items:
32      - const: i2s-regs
33      - const: i2s_gen_cfg
34
35  interrupts:
36    maxItems: 1
37
38  clocks:
39    items:
40      - description: Bus Clock
41      - description: Module Clock
42
43  clock-names:
44    items:
45      - const: osc
46      - const: apb_clk
47
48required:
49  - compatible
50  - "#sound-dai-cells"
51  - reg
52  - clocks
53  - clock-names
54  - interrupts
55
56additionalProperties: false
57
58examples:
59  - |
60     #include <dt-bindings/interrupt-controller/arm-gic.h>
61     #include <dt-bindings/interrupt-controller/irq.h>
62     #define KEEM_BAY_PSS_AUX_I2S3
63     #define KEEM_BAY_PSS_I2S3
64     i2s3: i2s@20140000 {
65         compatible = "intel,keembay-i2s";
66         #sound-dai-cells = <0>;
67         reg = <0x20140000 0x200>, /* I2S registers */
68               <0x202a00a4 0x4>; /* I2S gen configuration */
69         reg-names = "i2s-regs", "i2s_gen_cfg";
70         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
71         clock-names = "osc", "apb_clk";
72         clocks = <&scmi_clk KEEM_BAY_PSS_AUX_I2S3>, <&scmi_clk KEEM_BAY_PSS_I2S3>;
73     };
74