1e13c1180SDamien.HorsleyImagination Technologies I2S Input Controller
2e13c1180SDamien.Horsley
3e13c1180SDamien.HorsleyRequired Properties:
4e13c1180SDamien.Horsley
5e13c1180SDamien.Horsley  - compatible : Compatible list, must contain "img,i2s-in"
6e13c1180SDamien.Horsley
7e13c1180SDamien.Horsley  - #sound-dai-cells : Must be equal to 0
8e13c1180SDamien.Horsley
9e13c1180SDamien.Horsley  - reg : Offset and length of the register set for the device
10e13c1180SDamien.Horsley
11e13c1180SDamien.Horsley  - clocks : Contains an entry for each entry in clock-names
12e13c1180SDamien.Horsley
13e13c1180SDamien.Horsley  - clock-names : Must include the following entry:
14e13c1180SDamien.Horsley	"sys"	The system clock
15e13c1180SDamien.Horsley
16e13c1180SDamien.Horsley  - dmas: Contains an entry for each entry in dma-names.
17e13c1180SDamien.Horsley
18e13c1180SDamien.Horsley  - dma-names: Must include the following entry:
19e13c1180SDamien.Horsley	"rx"	Single DMA channel used by all active I2S channels
20e13c1180SDamien.Horsley
21e13c1180SDamien.Horsley  - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
22e13c1180SDamien.Horsley
23e13c1180SDamien.HorsleyOptional Properties:
24e13c1180SDamien.Horsley
25e13c1180SDamien.Horsley  - interrupts : Contains the I2S in interrupts. Depending on
26e13c1180SDamien.Horsley	the configuration, there may be no interrupts, one interrupt,
27e13c1180SDamien.Horsley	or an interrupt per I2S channel. For the case where there is
28e13c1180SDamien.Horsley	one interrupt per channel, the interrupts should be listed
29e13c1180SDamien.Horsley	in ascending channel order
30e13c1180SDamien.Horsley
31e13c1180SDamien.Horsley  - resets: Contains a phandle to the I2S in reset signal
32e13c1180SDamien.Horsley
33e13c1180SDamien.Horsley  - reset-names: Contains the reset signal name "rst"
34e13c1180SDamien.Horsley
35e13c1180SDamien.HorsleyExample:
36e13c1180SDamien.Horsley
37e13c1180SDamien.Horsleyi2s_in: i2s-in@18100800 {
38e13c1180SDamien.Horsley	compatible = "img,i2s-in";
39e13c1180SDamien.Horsley	reg = <0x18100800 0x200>;
40e13c1180SDamien.Horsley	interrupts = <GIC_SHARED 7 IRQ_TYPE_LEVEL_HIGH>;
41e13c1180SDamien.Horsley	dmas = <&mdc 30 0xffffffff 0>;
42e13c1180SDamien.Horsley	dma-names = "rx";
43e13c1180SDamien.Horsley	clocks = <&cr_periph SYS_CLK_I2S_IN>;
44e13c1180SDamien.Horsley	clock-names = "sys";
45e13c1180SDamien.Horsley	img,i2s-channels = <6>;
46e13c1180SDamien.Horsley	#sound-dai-cells = <0>;
47e13c1180SDamien.Horsley};
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