1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,sai.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale Synchronous Audio Interface (SAI).
8
9maintainers:
10  - Shengjiu Wang <shengjiu.wang@nxp.com>
11
12description: |
13  The SAI is based on I2S module that used communicating with audio codecs,
14  which provides a synchronous audio interface that supports fullduplex
15  serial interfaces with frame synchronization such as I2S, AC97, TDM, and
16  codec/DSP interfaces.
17
18properties:
19  compatible:
20    oneOf:
21      - items:
22          - enum:
23              - fsl,imx6ul-sai
24              - fsl,imx7d-sai
25          - const: fsl,imx6sx-sai
26
27      - items:
28          - enum:
29              - fsl,imx8mm-sai
30              - fsl,imx8mn-sai
31              - fsl,imx8mp-sai
32          - const: fsl,imx8mq-sai
33
34      - items:
35          - enum:
36              - fsl,imx6sx-sai
37              - fsl,imx7ulp-sai
38              - fsl,imx8mq-sai
39              - fsl,imx8qm-sai
40              - fsl,imx8ulp-sai
41              - fsl,imx93-sai
42              - fsl,vf610-sai
43
44  reg:
45    maxItems: 1
46
47  clocks:
48    items:
49      - description: The ipg clock for register access
50      - description: master clock source 0 (obsoleted)
51      - description: master clock source 1
52      - description: master clock source 2
53      - description: master clock source 3
54      - description: PLL clock source for 8kHz series
55      - description: PLL clock source for 11kHz series
56    minItems: 4
57
58  clock-names:
59    oneOf:
60      - items:
61          - const: bus
62          - const: mclk0
63          - const: mclk1
64          - const: mclk2
65          - const: mclk3
66          - const: pll8k
67          - const: pll11k
68        minItems: 5
69      - items:
70          - const: bus
71          - const: mclk1
72          - const: mclk2
73          - const: mclk3
74          - const: pll8k
75          - const: pll11k
76        minItems: 4
77
78  dmas:
79    items:
80      - description: DMA controller phandle and request line for RX
81      - description: DMA controller phandle and request line for TX
82
83  dma-names:
84    items:
85      - const: rx
86      - const: tx
87
88  interrupts:
89    items:
90      - description: receive and transmit interrupt
91
92  big-endian:
93    description: |
94      required if all the SAI registers are big-endian rather than little-endian.
95    type: boolean
96
97  fsl,dataline:
98    $ref: /schemas/types.yaml#/definitions/uint32-matrix
99    description: |
100      Configure the dataline. It has 3 value for each configuration
101    maxItems: 16
102    items:
103      items:
104        - description: format Default(0), I2S(1) or PDM(2)
105          enum: [0, 1, 2]
106        - description: dataline mask for 'rx'
107        - description: dataline mask for 'tx'
108
109  fsl,sai-mclk-direction-output:
110    description: SAI will output the SAI MCLK clock.
111    type: boolean
112
113  fsl,sai-synchronous-rx:
114    description: |
115      SAI will work in the synchronous mode (sync Tx with Rx) which means
116      both the transmitter and the receiver will send and receive data by
117      following receiver's bit clocks and frame sync clocks.
118    type: boolean
119
120  fsl,sai-asynchronous:
121    description: |
122      SAI will work in the asynchronous mode, which means both transmitter
123      and receiver will send and receive data by following their own bit clocks
124      and frame sync clocks separately.
125      If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
126      default synchronous mode (sync Rx with Tx) will be used, which means both
127      transmitter and receiver will send and receive data by following clocks
128      of transmitter.
129    type: boolean
130
131  fsl,shared-interrupt:
132    description: Interrupt is shared with other modules.
133    type: boolean
134
135  lsb-first:
136    description: |
137      Configures whether the LSB or the MSB is transmitted
138      first for the fifo data. If this property is absent,
139      the MSB is transmitted first as default, or the LSB
140      is transmitted first.
141    type: boolean
142
143  "#sound-dai-cells":
144    const: 0
145    description: optional, some dts node didn't add it.
146
147allOf:
148  - $ref: dai-common.yaml#
149  - if:
150      required:
151        - fsl,sai-asynchronous
152    then:
153      properties:
154        fsl,sai-synchronous-rx: false
155
156required:
157  - compatible
158  - reg
159  - clocks
160  - clock-names
161  - dmas
162  - dma-names
163  - interrupts
164
165unevaluatedProperties: false
166
167examples:
168  - |
169    #include <dt-bindings/interrupt-controller/arm-gic.h>
170    #include <dt-bindings/clock/vf610-clock.h>
171    sai2: sai@40031000 {
172        compatible = "fsl,vf610-sai";
173        reg = <0x40031000 0x1000>;
174        interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
175        pinctrl-names = "default";
176        pinctrl-0 = <&pinctrl_sai2_1>;
177        clocks = <&clks VF610_CLK_PLATFORM_BUS>,
178                 <&clks VF610_CLK_SAI2>,
179                 <&clks 0>, <&clks 0>;
180        clock-names = "bus", "mclk1", "mclk2", "mclk3";
181        dma-names = "rx", "tx";
182        dmas = <&edma0 0 20>, <&edma0 0 21>;
183        big-endian;
184        lsb-first;
185    };
186
187  - |
188    #include <dt-bindings/interrupt-controller/arm-gic.h>
189    #include <dt-bindings/clock/imx8mm-clock.h>
190    sai1: sai@30010000 {
191        compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
192        reg = <0x30010000 0x10000>;
193        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
194        clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
195                 <&clk IMX8MM_CLK_DUMMY>,
196                 <&clk IMX8MM_CLK_SAI1_ROOT>,
197                 <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
198        clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
199        dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
200        dma-names = "rx", "tx";
201        fsl,dataline = <1 0xff 0xff 2 0xff 0x11>;
202        #sound-dai-cells = <0>;
203    };
204