1*49c6bf62SShengjiu Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*49c6bf62SShengjiu Wang%YAML 1.2 3*49c6bf62SShengjiu Wang--- 4*49c6bf62SShengjiu Wang$id: http://devicetree.org/schemas/sound/fsl,rpmsg.yaml# 5*49c6bf62SShengjiu Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*49c6bf62SShengjiu Wang 7*49c6bf62SShengjiu Wangtitle: NXP Audio RPMSG CPU DAI Controller 8*49c6bf62SShengjiu Wang 9*49c6bf62SShengjiu Wangmaintainers: 10*49c6bf62SShengjiu Wang - Shengjiu Wang <shengjiu.wang@nxp.com> 11*49c6bf62SShengjiu Wang 12*49c6bf62SShengjiu Wangdescription: | 13*49c6bf62SShengjiu Wang fsl_rpmsg is a virtual audio device. Mapping to real hardware devices 14*49c6bf62SShengjiu Wang are SAI, DMA controlled by Cortex M core. What we see from Linux 15*49c6bf62SShengjiu Wang side is a device which provides audio service by rpmsg channel. 16*49c6bf62SShengjiu Wang 17*49c6bf62SShengjiu Wangproperties: 18*49c6bf62SShengjiu Wang compatible: 19*49c6bf62SShengjiu Wang enum: 20*49c6bf62SShengjiu Wang - fsl,imx7ulp-rpmsg-audio 21*49c6bf62SShengjiu Wang - fsl,imx8mn-rpmsg-audio 22*49c6bf62SShengjiu Wang - fsl,imx8mm-rpmsg-audio 23*49c6bf62SShengjiu Wang - fsl,imx8mp-rpmsg-audio 24*49c6bf62SShengjiu Wang 25*49c6bf62SShengjiu Wang model: 26*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/string 27*49c6bf62SShengjiu Wang description: User specified audio sound card name 28*49c6bf62SShengjiu Wang 29*49c6bf62SShengjiu Wang clocks: 30*49c6bf62SShengjiu Wang items: 31*49c6bf62SShengjiu Wang - description: Peripheral clock for register access 32*49c6bf62SShengjiu Wang - description: Master clock 33*49c6bf62SShengjiu Wang - description: DMA clock for DMA register access 34*49c6bf62SShengjiu Wang - description: Parent clock for multiple of 8kHz sample rates 35*49c6bf62SShengjiu Wang - description: Parent clock for multiple of 11kHz sample rates 36*49c6bf62SShengjiu Wang 37*49c6bf62SShengjiu Wang clock-names: 38*49c6bf62SShengjiu Wang items: 39*49c6bf62SShengjiu Wang - const: ipg 40*49c6bf62SShengjiu Wang - const: mclk 41*49c6bf62SShengjiu Wang - const: dma 42*49c6bf62SShengjiu Wang - const: pll8k 43*49c6bf62SShengjiu Wang - const: pll11k 44*49c6bf62SShengjiu Wang 45*49c6bf62SShengjiu Wang power-domains: 46*49c6bf62SShengjiu Wang description: 47*49c6bf62SShengjiu Wang List of phandle and PM domain specifier as documented in 48*49c6bf62SShengjiu Wang Documentation/devicetree/bindings/power/power_domain.txt 49*49c6bf62SShengjiu Wang maxItems: 1 50*49c6bf62SShengjiu Wang 51*49c6bf62SShengjiu Wang memory-region: 52*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/phandle 53*49c6bf62SShengjiu Wang description: 54*49c6bf62SShengjiu Wang phandle to a node describing reserved memory (System RAM memory) 55*49c6bf62SShengjiu Wang The M core can't access all the DDR memory space on some platform, 56*49c6bf62SShengjiu Wang So reserved a specific memory for dma buffer which M core can 57*49c6bf62SShengjiu Wang access. 58*49c6bf62SShengjiu Wang (see bindings/reserved-memory/reserved-memory.txt) 59*49c6bf62SShengjiu Wang 60*49c6bf62SShengjiu Wang audio-codec: 61*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/phandle 62*49c6bf62SShengjiu Wang description: The phandle to a node of audio codec 63*49c6bf62SShengjiu Wang 64*49c6bf62SShengjiu Wang audio-routing: 65*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/non-unique-string-array 66*49c6bf62SShengjiu Wang description: | 67*49c6bf62SShengjiu Wang A list of the connections between audio components. Each entry is a 68*49c6bf62SShengjiu Wang pair of strings, the first being the connection's sink, the second 69*49c6bf62SShengjiu Wang being the connection's source. 70*49c6bf62SShengjiu Wang 71*49c6bf62SShengjiu Wang fsl,enable-lpa: 72*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/flag 73*49c6bf62SShengjiu Wang description: enable low power audio path. 74*49c6bf62SShengjiu Wang 75*49c6bf62SShengjiu Wang fsl,rpmsg-out: 76*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/flag 77*49c6bf62SShengjiu Wang description: | 78*49c6bf62SShengjiu Wang This is a boolean property. If present, the transmitting function 79*49c6bf62SShengjiu Wang will be enabled. 80*49c6bf62SShengjiu Wang 81*49c6bf62SShengjiu Wang fsl,rpmsg-in: 82*49c6bf62SShengjiu Wang $ref: /schemas/types.yaml#/definitions/flag 83*49c6bf62SShengjiu Wang description: | 84*49c6bf62SShengjiu Wang This is a boolean property. If present, the receiving function 85*49c6bf62SShengjiu Wang will be enabled. 86*49c6bf62SShengjiu Wang 87*49c6bf62SShengjiu Wangrequired: 88*49c6bf62SShengjiu Wang - compatible 89*49c6bf62SShengjiu Wang - model 90*49c6bf62SShengjiu Wang 91*49c6bf62SShengjiu WangadditionalProperties: false 92*49c6bf62SShengjiu Wang 93*49c6bf62SShengjiu Wangexamples: 94*49c6bf62SShengjiu Wang - | 95*49c6bf62SShengjiu Wang #include <dt-bindings/clock/imx8mn-clock.h> 96*49c6bf62SShengjiu Wang 97*49c6bf62SShengjiu Wang rpmsg_audio: rpmsg_audio { 98*49c6bf62SShengjiu Wang compatible = "fsl,imx8mn-rpmsg-audio"; 99*49c6bf62SShengjiu Wang model = "wm8524-audio"; 100*49c6bf62SShengjiu Wang fsl,enable-lpa; 101*49c6bf62SShengjiu Wang fsl,rpmsg-out; 102*49c6bf62SShengjiu Wang clocks = <&clk IMX8MN_CLK_SAI3_IPG>, 103*49c6bf62SShengjiu Wang <&clk IMX8MN_CLK_SAI3_ROOT>, 104*49c6bf62SShengjiu Wang <&clk IMX8MN_CLK_SDMA3_ROOT>, 105*49c6bf62SShengjiu Wang <&clk IMX8MN_AUDIO_PLL1_OUT>, 106*49c6bf62SShengjiu Wang <&clk IMX8MN_AUDIO_PLL2_OUT>; 107*49c6bf62SShengjiu Wang clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k"; 108*49c6bf62SShengjiu Wang }; 109