1a960de4dSShengjiu Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2a960de4dSShengjiu Wang%YAML 1.2 3a960de4dSShengjiu Wang--- 4a960de4dSShengjiu Wang$id: http://devicetree.org/schemas/sound/fsl,easrc.yaml# 5a960de4dSShengjiu Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 6a960de4dSShengjiu Wang 7a960de4dSShengjiu Wangtitle: NXP Asynchronous Sample Rate Converter (ASRC) Controller 8a960de4dSShengjiu Wang 9a960de4dSShengjiu Wangmaintainers: 10a960de4dSShengjiu Wang - Shengjiu Wang <shengjiu.wang@nxp.com> 11a960de4dSShengjiu Wang 12a960de4dSShengjiu Wangproperties: 13a960de4dSShengjiu Wang $nodename: 14a960de4dSShengjiu Wang pattern: "^easrc@.*" 15a960de4dSShengjiu Wang 16a960de4dSShengjiu Wang compatible: 17a960de4dSShengjiu Wang const: fsl,imx8mn-easrc 18a960de4dSShengjiu Wang 19a960de4dSShengjiu Wang reg: 20a960de4dSShengjiu Wang maxItems: 1 21a960de4dSShengjiu Wang 22a960de4dSShengjiu Wang interrupts: 23a960de4dSShengjiu Wang maxItems: 1 24a960de4dSShengjiu Wang 25a960de4dSShengjiu Wang clocks: 26a960de4dSShengjiu Wang items: 27a960de4dSShengjiu Wang - description: Peripheral clock 28a960de4dSShengjiu Wang 29a960de4dSShengjiu Wang clock-names: 30a960de4dSShengjiu Wang items: 31a960de4dSShengjiu Wang - const: mem 32a960de4dSShengjiu Wang 33a960de4dSShengjiu Wang dmas: 34a960de4dSShengjiu Wang maxItems: 8 35a960de4dSShengjiu Wang 36a960de4dSShengjiu Wang dma-names: 37a960de4dSShengjiu Wang items: 38a960de4dSShengjiu Wang - const: ctx0_rx 39a960de4dSShengjiu Wang - const: ctx0_tx 40a960de4dSShengjiu Wang - const: ctx1_rx 41a960de4dSShengjiu Wang - const: ctx1_tx 42a960de4dSShengjiu Wang - const: ctx2_rx 43a960de4dSShengjiu Wang - const: ctx2_tx 44a960de4dSShengjiu Wang - const: ctx3_rx 45a960de4dSShengjiu Wang - const: ctx3_tx 46a960de4dSShengjiu Wang 47a960de4dSShengjiu Wang firmware-name: 48a960de4dSShengjiu Wang allOf: 49a960de4dSShengjiu Wang - $ref: /schemas/types.yaml#/definitions/string 50a960de4dSShengjiu Wang - const: imx/easrc/easrc-imx8mn.bin 51a960de4dSShengjiu Wang description: The coefficient table for the filters 52a960de4dSShengjiu Wang 53a960de4dSShengjiu Wang fsl,asrc-rate: 54a960de4dSShengjiu Wang allOf: 55a960de4dSShengjiu Wang - $ref: /schemas/types.yaml#/definitions/uint32 56a960de4dSShengjiu Wang - minimum: 8000 57a960de4dSShengjiu Wang - maximum: 192000 58a960de4dSShengjiu Wang description: Defines a mutual sample rate used by DPCM Back Ends 59a960de4dSShengjiu Wang 60a960de4dSShengjiu Wang fsl,asrc-format: 61a960de4dSShengjiu Wang allOf: 62a960de4dSShengjiu Wang - $ref: /schemas/types.yaml#/definitions/uint32 63a960de4dSShengjiu Wang - enum: [2, 6, 10, 32, 36] 64a960de4dSShengjiu Wang default: 2 65a960de4dSShengjiu Wang description: 66a960de4dSShengjiu Wang Defines a mutual sample format used by DPCM Back Ends 67a960de4dSShengjiu Wang 68a960de4dSShengjiu Wangrequired: 69a960de4dSShengjiu Wang - compatible 70a960de4dSShengjiu Wang - reg 71a960de4dSShengjiu Wang - interrupts 72a960de4dSShengjiu Wang - clocks 73a960de4dSShengjiu Wang - clock-names 74a960de4dSShengjiu Wang - dmas 75a960de4dSShengjiu Wang - dma-names 76a960de4dSShengjiu Wang - firmware-name 77a960de4dSShengjiu Wang - fsl,asrc-rate 78a960de4dSShengjiu Wang - fsl,asrc-format 79a960de4dSShengjiu Wang 80a960de4dSShengjiu Wangexamples: 81a960de4dSShengjiu Wang - | 82a960de4dSShengjiu Wang #include <dt-bindings/clock/imx8mn-clock.h> 83a960de4dSShengjiu Wang 84a960de4dSShengjiu Wang easrc: easrc@300c0000 { 85a960de4dSShengjiu Wang compatible = "fsl,imx8mn-easrc"; 86a960de4dSShengjiu Wang reg = <0x0 0x300c0000 0x0 0x10000>; 87a960de4dSShengjiu Wang interrupts = <0x0 122 0x4>; 88a960de4dSShengjiu Wang clocks = <&clk IMX8MN_CLK_ASRC_ROOT>; 89a960de4dSShengjiu Wang clock-names = "mem"; 90a960de4dSShengjiu Wang dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>, 91a960de4dSShengjiu Wang <&sdma2 18 23 0> , <&sdma2 19 23 0>, 92a960de4dSShengjiu Wang <&sdma2 20 23 0> , <&sdma2 21 23 0>, 93a960de4dSShengjiu Wang <&sdma2 22 23 0> , <&sdma2 23 23 0>; 94a960de4dSShengjiu Wang dma-names = "ctx0_rx", "ctx0_tx", 95a960de4dSShengjiu Wang "ctx1_rx", "ctx1_tx", 96a960de4dSShengjiu Wang "ctx2_rx", "ctx2_tx", 97a960de4dSShengjiu Wang "ctx3_rx", "ctx3_tx"; 98a960de4dSShengjiu Wang firmware-name = "imx/easrc/easrc-imx8mn.bin"; 99a960de4dSShengjiu Wang fsl,asrc-rate = <8000>; 100a960de4dSShengjiu Wang fsl,asrc-format = <2>; 101a960de4dSShengjiu Wang }; 102