12b65df25SPaul HandriganCS4265 audio CODEC 22b65df25SPaul Handrigan 32b65df25SPaul HandriganThis device supports I2C only. 42b65df25SPaul Handrigan 52b65df25SPaul HandriganRequired properties: 62b65df25SPaul Handrigan 72b65df25SPaul Handrigan - compatible : "cirrus,cs4265" 82b65df25SPaul Handrigan 92b65df25SPaul Handrigan - reg : the I2C address of the device for I2C. The I2C address depends on 102b65df25SPaul Handrigan the state of the AD0 pin. If AD0 is high, the i2c address is 0x4f. 112b65df25SPaul Handrigan If it is low, the i2c address is 0x4e. 122b65df25SPaul Handrigan 132b65df25SPaul HandriganOptional properties: 142b65df25SPaul Handrigan 152b65df25SPaul Handrigan - reset-gpios : a GPIO spec for the reset pin. If specified, it will be 162b65df25SPaul Handrigan deasserted before communication to the codec starts. 172b65df25SPaul Handrigan 182b65df25SPaul HandriganExamples: 192b65df25SPaul Handrigan 202b65df25SPaul Handrigancodec_ad0_high: cs4265@4f { /* AD0 Pin is high */ 212b65df25SPaul Handrigan compatible = "cirrus,cs4265"; 222b65df25SPaul Handrigan reg = <0x4f>; 232b65df25SPaul Handrigan}; 242b65df25SPaul Handrigan 252b65df25SPaul Handrigan 262b65df25SPaul Handrigancodec_ad0_low: cs4265@4e { /* AD0 Pin is low */ 272b65df25SPaul Handrigan compatible = "cirrus,cs4265"; 282b65df25SPaul Handrigan reg = <0x4e>; 292b65df25SPaul Handrigan}; 30