1CS35L35 Boosted Speaker Amplifier
2
3Required properties:
4
5  - compatible : "cirrus,cs35l35"
6
7  - reg : the I2C address of the device for I2C
8
9  - VA-supply, VP-supply : power supplies for the device,
10    as covered in
11    Documentation/devicetree/bindings/regulator/regulator.txt.
12
13  - interrupt-parent : Specifies the phandle of the interrupt controller to
14    which the IRQs from CS35L35 are delivered to.
15  - interrupts : IRQ line info CS35L35.
16    (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
17    for further information relating to interrupt properties)
18
19Optional properties:
20  - reset-gpios : gpio used to reset the amplifier
21
22  - cirrus,stereo-config : Boolean to determine if there are 2 AMPs for a
23  Stereo configuration
24
25  - cirrus,audio-channel : Set Location of Audio Signal on Serial Port
26  0 = Data Packet received on Left I2S Channel
27  1 = Data Packet received on Right I2S Channel
28
29  - cirrus,advisory-channel : Set Location of Advisory Signal on Serial Port
30  0 = Data Packet received on Left I2S Channel
31  1 = Data Packet received on Right I2S Channel
32
33  - cirrus,shared-boost : Boolean to enable ClassH tracking of Advisory Signal
34  if 2 Devices share Boost BST_CTL
35
36  - cirrus,sp-drv-strength : Value for setting the Serial Port drive strength
37  Table 3-10 of the datasheet lists drive-strength specifications
38  0 = 1x (Default)
39  1 = .5x
40
41  - cirrus,bst-pdn-fet-on : Boolean to determine if the Boost PDN control
42  powers down with a rectification FET On or Off. If VSPK is supplied
43  externally then FET is off.
44
45  - cirrus,boost-ctl-millivolt : Boost Voltage Value.  Configures the boost
46    converter's output voltage in mV. The range is from 2600mV to 9000mV with
47    increments of 100mV.
48    (Default) VP
49
50  - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA.
51  Configures the peak current by monitoring the current through the boost FET.
52  Range starts at 1680mA and goes to a maximum of 4480mA with increments of
53  110mA.
54  (Default) 2.46 Amps
55
56  - cirrus,amp-gain-zc : Boolean to determine if to use Amplifier gain-change
57  zero-cross
58
59Optional H/G Algorithm sub-node:
60
61  The cs35l35 node can have a single "cirrus,classh-internal-algo" sub-node
62  that will disable automatic control of the internal H/G Algorithm.
63
64  It is strongly recommended that the Datasheet be referenced when adjusting
65  or using these Class H Algorithm controls over the internal Algorithm.
66  Serious damage can occur to the Device and surrounding components.
67
68  - cirrus,classh-internal-algo : Sub-node for the Internal Class H Algorithm
69  See Section 4.3 Internal Class H Algorithm in the Datasheet.
70  If not used, the device manages the ClassH Algorithm internally.
71
72Optional properties for the "cirrus,classh-internal-algo" Sub-node
73
74  Section 7.29 Class H Control
75  - cirrus,classh-bst-overide : Boolean
76  - cirrus,classh-bst-max-limit
77  - cirrus,classh-mem-depth
78
79  Section 7.30 Class H Headroom Control
80  - cirrus,classh-headroom
81
82  Section 7.31 Class H Release Rate
83  - cirrus,classh-release-rate
84
85  Section 7.32 Class H Weak FET Drive Control
86  - cirrus,classh-wk-fet-disable
87  - cirrus,classh-wk-fet-delay
88  - cirrus,classh-wk-fet-thld
89
90  Section 7.34 Class H VP Control
91  - cirrus,classh-vpch-auto
92  - cirrus,classh-vpch-rate
93  - cirrus,classh-vpch-man
94
95Optional Monitor Signal Format sub-node:
96
97  The cs35l35 node can have a single "cirrus,monitor-signal-format" sub-node
98  for adjusting the Depth, Location and Frame of the Monitoring Signals
99  for Algorithms.
100
101  See Sections 4.8.2 through 4.8.4 Serial-Port Control in the Datasheet
102
103  -cirrus,monitor-signal-format : Sub-node for the Monitor Signaling Formating
104  on the I2S Port. Each of the 3 8 bit values in the array contain the settings
105  for depth, location, and frame.
106
107  If not used, the defaults for the 6 monitor signals is used.
108
109  Sections 7.44 - 7.53 lists values for the depth, location, and frame
110  for each monitoring signal.
111
112  - cirrus,imon : 3 8 bit values to set the depth, location, and frame
113  of the IMON monitor signal.
114
115  - cirrus,vmon : 3 8 bit values to set the depth, location, and frame
116  of the VMON monitor signal.
117
118  - cirrus,vpmon : 3 8 bit values to set the depth, location, and frame
119  of the VPMON monitor signal.
120
121  - cirrus,vbstmon : 3 8 bit values to set the depth, location, and frame
122  of the VBSTMON monitor signal
123
124  - cirrus,vpbrstat : 3 8 bit values to set the depth, location, and frame
125  of the VPBRSTAT monitor signal
126
127  - cirrus,zerofill : 3 8 bit values to set the depth, location, and frame\
128  of the ZEROFILL packet in the monitor signal
129
130Example:
131
132cs35l35: cs35l35@20 {
133	compatible = "cirrus,cs35l35";
134	reg = <0x20>;
135	VA-supply = <&dummy_vreg>;
136	VP-supply = <&dummy_vreg>;
137	reset-gpios = <&axi_gpio 54 0>;
138	interrupt-parent = <&gpio8>;
139	interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
140	cirrus,boost-ctl-millivolt = <9000>;
141
142	cirrus,stereo-config;
143	cirrus,audio-channel = <0x00>;
144	cirrus,advisory-channel = <0x01>;
145	cirrus,shared-boost;
146
147	cirrus,classh-internal-algo {
148		cirrus,classh-bst-overide;
149		cirrus,classh-bst-max-limit = <0x01>;
150		cirrus,classh-mem-depth = <0x01>;
151		cirrus,classh-release-rate = <0x08>;
152		cirrus,classh-headroom-millivolt = <0x0B>;
153		cirrus,classh-wk-fet-disable = <0x01>;
154		cirrus,classh-wk-fet-delay = <0x04>;
155		cirrus,classh-wk-fet-thld = <0x01>;
156		cirrus,classh-vpch-auto = <0x01>;
157		cirrus,classh-vpch-rate = <0x02>;
158		cirrus,classh-vpch-man = <0x05>;
159	};
160
161	/* Depth, Location, Frame */
162	cirrus,monitor-signal-format {
163		cirrus,imon = /bits/ 8 <0x03 0x00 0x01>;
164		cirrus,vmon = /bits/ 8 <0x03 0x00 0x00>;
165		cirrus,vpmon = /bits/ 8 <0x03 0x04 0x00>;
166		cirrus,vbstmon = /bits/ 8 <0x03 0x04 0x01>;
167		cirrus,vpbrstat = /bits/ 8 <0x00 0x04 0x00>;
168		cirrus,zerofill = /bits/ 8 <0x00 0x00 0x00>;
169	};
170
171};
172