1*a3b19e0cSRyan Wanner# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*a3b19e0cSRyan Wanner# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3*a3b19e0cSRyan Wanner%YAML 1.2
4*a3b19e0cSRyan Wanner---
5*a3b19e0cSRyan Wanner$id: http://devicetree.org/schemas/sound/atmel,sama5d2-classd.yaml#
6*a3b19e0cSRyan Wanner$schema: http://devicetree.org/meta-schemas/core.yaml#
7*a3b19e0cSRyan Wanner
8*a3b19e0cSRyan Wannertitle: Atmel ClassD Amplifier
9*a3b19e0cSRyan Wanner
10*a3b19e0cSRyan Wannermaintainers:
11*a3b19e0cSRyan Wanner  - Nicolas Ferre <nicolas.ferre@microchip.com>
12*a3b19e0cSRyan Wanner  - Alexandre Belloni <alexandre.belloni@bootlin.com>
13*a3b19e0cSRyan Wanner  - Claudiu Beznea <claudiu.beznea@microchip.com>
14*a3b19e0cSRyan Wanner
15*a3b19e0cSRyan Wannerdescription:
16*a3b19e0cSRyan Wanner  The Audio Class D Amplifier (CLASSD) is a digital input, Pulse Width
17*a3b19e0cSRyan Wanner  Modulated (PWM) output stereo Class D amplifier.
18*a3b19e0cSRyan Wanner
19*a3b19e0cSRyan Wannerproperties:
20*a3b19e0cSRyan Wanner  compatible:
21*a3b19e0cSRyan Wanner    const: atmel,sama5d2-classd
22*a3b19e0cSRyan Wanner
23*a3b19e0cSRyan Wanner  reg:
24*a3b19e0cSRyan Wanner    maxItems: 1
25*a3b19e0cSRyan Wanner
26*a3b19e0cSRyan Wanner  interrupts:
27*a3b19e0cSRyan Wanner    maxItems: 1
28*a3b19e0cSRyan Wanner
29*a3b19e0cSRyan Wanner  dmas:
30*a3b19e0cSRyan Wanner    maxItems: 1
31*a3b19e0cSRyan Wanner
32*a3b19e0cSRyan Wanner  dma-names:
33*a3b19e0cSRyan Wanner    const: tx
34*a3b19e0cSRyan Wanner
35*a3b19e0cSRyan Wanner  clocks:
36*a3b19e0cSRyan Wanner    maxItems: 2
37*a3b19e0cSRyan Wanner
38*a3b19e0cSRyan Wanner  clock-names:
39*a3b19e0cSRyan Wanner    items:
40*a3b19e0cSRyan Wanner      - const: pclk
41*a3b19e0cSRyan Wanner      - const: gclk
42*a3b19e0cSRyan Wanner
43*a3b19e0cSRyan Wanner  atmel,model:
44*a3b19e0cSRyan Wanner    $ref: /schemas/types.yaml#/definitions/string
45*a3b19e0cSRyan Wanner    default: CLASSD
46*a3b19e0cSRyan Wanner    description: The user-visible name of this sound complex.
47*a3b19e0cSRyan Wanner
48*a3b19e0cSRyan Wanner  atmel,pwm-type:
49*a3b19e0cSRyan Wanner    $ref: /schemas/types.yaml#/definitions/string
50*a3b19e0cSRyan Wanner    enum:
51*a3b19e0cSRyan Wanner      - single
52*a3b19e0cSRyan Wanner      - diff
53*a3b19e0cSRyan Wanner    default: single
54*a3b19e0cSRyan Wanner    description: PWM modulation type.
55*a3b19e0cSRyan Wanner
56*a3b19e0cSRyan Wanner  atmel,non-overlap-time:
57*a3b19e0cSRyan Wanner    $ref: /schemas/types.yaml#/definitions/uint32
58*a3b19e0cSRyan Wanner    enum:
59*a3b19e0cSRyan Wanner      - 5
60*a3b19e0cSRyan Wanner      - 10
61*a3b19e0cSRyan Wanner      - 15
62*a3b19e0cSRyan Wanner      - 20
63*a3b19e0cSRyan Wanner    default: 10
64*a3b19e0cSRyan Wanner    description:
65*a3b19e0cSRyan Wanner      Set non-overlapping time, the unit is nanosecond(ns).
66*a3b19e0cSRyan Wanner      Non-overlapping will be disabled if not specified.
67*a3b19e0cSRyan Wanner
68*a3b19e0cSRyan Wannerrequired:
69*a3b19e0cSRyan Wanner  - compatible
70*a3b19e0cSRyan Wanner  - reg
71*a3b19e0cSRyan Wanner  - interrupts
72*a3b19e0cSRyan Wanner  - dmas
73*a3b19e0cSRyan Wanner  - dma-names
74*a3b19e0cSRyan Wanner  - clock-names
75*a3b19e0cSRyan Wanner  - clocks
76*a3b19e0cSRyan Wanner
77*a3b19e0cSRyan WanneradditionalProperties: false
78*a3b19e0cSRyan Wanner
79*a3b19e0cSRyan Wannerexamples:
80*a3b19e0cSRyan Wanner  - |
81*a3b19e0cSRyan Wanner    #include <dt-bindings/dma/at91.h>
82*a3b19e0cSRyan Wanner    #include <dt-bindings/interrupt-controller/arm-gic.h>
83*a3b19e0cSRyan Wanner
84*a3b19e0cSRyan Wanner    classd: sound@fc048000 {
85*a3b19e0cSRyan Wanner        compatible = "atmel,sama5d2-classd";
86*a3b19e0cSRyan Wanner        reg = <0xfc048000 0x100>;
87*a3b19e0cSRyan Wanner        interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
88*a3b19e0cSRyan Wanner        dmas = <&dma0
89*a3b19e0cSRyan Wanner            (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
90*a3b19e0cSRyan Wanner            | AT91_XDMAC_DT_PERID(47))>;
91*a3b19e0cSRyan Wanner        dma-names = "tx";
92*a3b19e0cSRyan Wanner        clocks = <&classd_clk>, <&classd_gclk>;
93*a3b19e0cSRyan Wanner        clock-names = "pclk", "gclk";
94*a3b19e0cSRyan Wanner        assigned-clocks = <&classd_gclk>;
95*a3b19e0cSRyan Wanner        pinctrl-names = "default";
96*a3b19e0cSRyan Wanner        pinctrl-0 = <&pinctrl_classd_default>;
97*a3b19e0cSRyan Wanner        atmel,model = "classd @ SAMA5D2-Xplained";
98*a3b19e0cSRyan Wanner        atmel,pwm-type = "diff";
99*a3b19e0cSRyan Wanner        atmel,non-overlap-time = <10>;
100*a3b19e0cSRyan Wanner    };
101