1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/soc/ti/ti,pruss.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: |+
8  TI Programmable Real-Time Unit and Industrial Communication Subsystem
9
10maintainers:
11  - Suman Anna <s-anna@ti.com>
12
13description: |+
14
15  The Programmable Real-Time Unit and Industrial Communication Subsystem
16  (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17  Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18  cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
19  instruction RAMs, some internal peripheral modules to facilitate industrial
20  communication, and an interrupt controller.
21
22  The programmable nature of the PRUs provide flexibility to implement custom
23  peripheral interfaces, fast real-time responses, or specialized data handling.
24  The common peripheral modules include the following,
25    - an Ethernet MII_RT module with two MII ports
26    - an MDIO port to control external Ethernet PHYs
27    - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
28      Ethernet functions
29    - an Enhanced Capture Module (eCAP)
30    - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
31    - a 16550-compatible UART to support PROFIBUS
32    - Enhanced GPIO with async capture and serial support
33
34  A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
35  acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
36  0x0, but also has access to a secondary Data RAM (primary to the other PRU
37  core) at its address 0x2000. A shared Data RAM, if present, can be accessed
38  by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are
39  common to both the PRU cores. Each PRU core also has a private instruction
40  RAM, and specific register spaces for Control and Debug functionalities.
41
42  Various sub-modules within a PRU-ICSS subsystem are represented as individual
43  nodes and are defined using a parent-child hierarchy depending on their
44  integration within the IP and the SoC. These nodes are described in the
45  following sections.
46
47
48  PRU-ICSS Node
49  ==============
50  Each PRU-ICSS instance is represented as its own node with the individual PRU
51  processor cores, the memories node, an INTC node and an MDIO node represented
52  as child nodes within this PRUSS node. This node shall be a child of the
53  corresponding interconnect bus nodes or target-module nodes.
54
55  See ../../mfd/syscon.yaml for generic SysCon binding details.
56
57
58properties:
59  $nodename:
60    pattern: "^(pruss|icssg)@[0-9a-f]+$"
61
62  compatible:
63    enum:
64      - ti,am3356-pruss  # for AM335x SoC family
65      - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
66      - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
67      - ti,am5728-pruss  # for AM57xx SoC family
68      - ti,k2g-pruss     # for 66AK2G SoC family
69      - ti,am654-icssg   # for K3 AM65x SoC family
70      - ti,j721e-icssg   # for K3 J721E SoC family
71      - ti,am642-icssg   # for K3 AM64x SoC family
72
73  reg:
74    maxItems: 1
75
76  "#address-cells":
77    const: 1
78
79  "#size-cells":
80    const: 1
81
82  ranges:
83    maxItems: 1
84
85  dma-ranges:
86    maxItems: 1
87
88  dma-coherent: true
89
90  power-domains:
91    description: |
92      This property is as per sci-pm-domain.txt.
93
94patternProperties:
95
96  memories@[a-f0-9]+$:
97    description: |
98      The various Data RAMs within a single PRU-ICSS unit are represented as a
99      single node with the name 'memories'.
100
101    type: object
102
103    properties:
104      reg:
105        minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM.
106        items:
107          - description: Address and size of the Data RAM0.
108          - description: Address and size of the Data RAM1.
109          - description: |
110              Address and size of the Shared Data RAM. Note that on AM437x one
111              of two PRUSS units don't contain Shared RAM, while the second one
112              has it.
113
114      reg-names:
115        minItems: 2
116        items:
117          - const: dram0
118          - const: dram1
119          - const: shrdram2
120
121    required:
122      - reg
123      - reg-names
124
125    additionalProperties: false
126
127  cfg@[a-f0-9]+$:
128    description: |
129      PRU-ICSS configuration space. CFG sub-module represented as a SysCon.
130
131    type: object
132
133    properties:
134      compatible:
135        items:
136          - const: ti,pruss-cfg
137          - const: syscon
138
139      "#address-cells":
140        const: 1
141
142      "#size-cells":
143        const: 1
144
145      reg:
146        maxItems: 1
147
148      ranges:
149        maxItems: 1
150
151      clocks:
152        type: object
153
154        properties:
155          "#address-cells":
156            const: 1
157
158          "#size-cells":
159            const: 0
160
161        patternProperties:
162          coreclk-mux@[a-f0-9]+$:
163            description: |
164              This is applicable only for ICSSG (K3 SoCs). The ICSSG modules
165              core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or
166              ICSSG_ICLK.  This node models this clock mux and should have the
167              name "coreclk-mux".
168
169            type: object
170
171            properties:
172              '#clock-cells':
173                const: 0
174
175              clocks:
176                items:
177                  - description: ICSSG_CORE Clock
178                  - description: ICSSG_ICLK Clock
179
180              assigned-clocks:
181                maxItems: 1
182
183              assigned-clock-parents:
184                maxItems: 1
185                description: |
186                  Standard assigned-clocks-parents definition used for selecting
187                  mux parent (one of the mux input).
188
189              reg:
190                maxItems: 1
191
192            required:
193              - clocks
194
195            additionalProperties: false
196
197          iepclk-mux@[a-f0-9]+$:
198            description: |
199              The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or
200              CORE_CLK (OCP_CLK in older SoCs). This node models this clock
201              mux and should have the name "iepclk-mux".
202
203            type: object
204
205            properties:
206              '#clock-cells':
207                const: 0
208
209              clocks:
210                items:
211                  - description: ICSSG_IEP Clock
212                  - description: Core Clock (OCP Clock in older SoCs)
213
214              assigned-clocks:
215                maxItems: 1
216
217              assigned-clock-parents:
218                maxItems: 1
219                description: |
220                  Standard assigned-clocks-parents definition used for selecting
221                  mux parent (one of the mux input).
222
223              reg:
224                maxItems: 1
225
226            required:
227              - clocks
228
229            additionalProperties: false
230
231        additionalProperties: false
232
233  iep@[a-f0-9]+$:
234    description: |
235      Industrial Ethernet Peripheral to manage/generate Industrial Ethernet
236      functions such as time stamping. Each PRUSS has either 1 IEP (on AM335x,
237      AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
238      IEP is used for creating PTP clocks and generating PPS signals.
239
240    type: object
241
242  mii-rt@[a-f0-9]+$:
243    description: |
244      Real-Time Ethernet to support multiple industrial communication protocols.
245      MII-RT sub-module represented as a SysCon.
246
247    type: object
248
249    properties:
250      compatible:
251        items:
252          - const: ti,pruss-mii
253          - const: syscon
254
255      reg:
256        maxItems: 1
257
258    additionalProperties: false
259
260  mii-g-rt@[a-f0-9]+$:
261    description: |
262      The Real-time Media Independent Interface to support multiple industrial
263      communication protocols (G stands for Gigabit). MII-G-RT sub-module
264      represented as a SysCon.
265
266    type: object
267
268    properties:
269      compatible:
270        items:
271          - const: ti,pruss-mii-g
272          - const: syscon
273
274      reg:
275        maxItems: 1
276
277    additionalProperties: false
278
279  interrupt-controller@[a-f0-9]+$:
280    description: |
281      PRUSS INTC Node. Each PRUSS has a single interrupt controller instance
282      that is common to all the PRU cores. This should be represented as an
283      interrupt-controller node.
284
285    allOf:
286      - $ref: /schemas/interrupt-controller/ti,pruss-intc.yaml#
287
288    type: object
289
290  mdio@[a-f0-9]+$:
291    description: |
292      MDIO Node. Each PRUSS has an MDIO module that can be used to control
293      external PHYs. The MDIO module used within the PRU-ICSS is an instance of
294      the MDIO Controller used in TI Davinci SoCs.
295
296    allOf:
297      - $ref: /schemas/net/ti,davinci-mdio.yaml#
298
299    type: object
300
301  "^(pru|rtu|txpru)@[0-9a-f]+$":
302    description: |
303      PRU Node. Each PRUSS has dual PRU cores, each represented as a RemoteProc
304      device through a PRU child node each. Each node can optionally be rendered
305      inactive by using the standard DT string property, "status". The ICSSG IP
306      present on K3 SoCs have additional auxiliary PRU cores with slightly
307      different IP integration.
308
309    allOf:
310      - $ref: /schemas/remoteproc/ti,pru-rproc.yaml#
311
312    type: object
313
314required:
315  - compatible
316  - reg
317  - ranges
318
319additionalProperties: false
320
321# Due to inability of correctly verifying sub-nodes with an @address through
322# the "required" list, the required sub-nodes below are commented out for now.
323
324#required:
325# - memories
326# - interrupt-controller
327# - pru
328
329allOf:
330  - if:
331      properties:
332        compatible:
333          contains:
334            enum:
335              - ti,k2g-pruss
336              - ti,am654-icssg
337              - ti,j721e-icssg
338              - ti,am642-icssg
339    then:
340      required:
341        - power-domains
342
343  - if:
344      properties:
345        compatible:
346          contains:
347            enum:
348              - ti,k2g-pruss
349    then:
350      required:
351        - dma-coherent
352
353examples:
354  - |
355
356    /* Example 1 AM33xx PRU-ICSS */
357    pruss: pruss@0 {
358        compatible = "ti,am3356-pruss";
359        reg = <0x0 0x80000>;
360        #address-cells = <1>;
361        #size-cells = <1>;
362        ranges;
363
364        pruss_mem: memories@0 {
365            reg = <0x0 0x2000>,
366                  <0x2000 0x2000>,
367                  <0x10000 0x3000>;
368            reg-names = "dram0", "dram1", "shrdram2";
369        };
370
371        pruss_cfg: cfg@26000 {
372            compatible = "ti,pruss-cfg", "syscon";
373            #address-cells = <1>;
374            #size-cells = <1>;
375            reg = <0x26000 0x2000>;
376            ranges = <0x00 0x26000 0x2000>;
377
378            clocks {
379                #address-cells = <1>;
380                #size-cells = <0>;
381
382                pruss_iepclk_mux: iepclk-mux@30 {
383                    reg = <0x30>;
384                    #clock-cells = <0>;
385                    clocks = <&l3_gclk>,        /* icss_iep */
386                             <&pruss_ocp_gclk>; /* icss_ocp */
387                };
388            };
389        };
390
391        pruss_mii_rt: mii-rt@32000 {
392            compatible = "ti,pruss-mii", "syscon";
393            reg = <0x32000 0x58>;
394        };
395
396        pruss_intc: interrupt-controller@20000 {
397            compatible = "ti,pruss-intc";
398            reg = <0x20000 0x2000>;
399            interrupt-controller;
400            #interrupt-cells = <3>;
401            interrupts = <20 21 22 23 24 25 26 27>;
402            interrupt-names = "host_intr0", "host_intr1",
403                              "host_intr2", "host_intr3",
404                              "host_intr4", "host_intr5",
405                              "host_intr6", "host_intr7";
406        };
407
408        pru0: pru@34000 {
409            compatible = "ti,am3356-pru";
410            reg = <0x34000 0x2000>,
411                  <0x22000 0x400>,
412                  <0x22400 0x100>;
413            reg-names = "iram", "control", "debug";
414            firmware-name = "am335x-pru0-fw";
415        };
416
417        pru1: pru@38000 {
418            compatible = "ti,am3356-pru";
419            reg = <0x38000 0x2000>,
420                  <0x24000 0x400>,
421                  <0x24400 0x100>;
422            reg-names = "iram", "control", "debug";
423            firmware-name = "am335x-pru1-fw";
424        };
425
426        pruss_mdio: mdio@32400 {
427            compatible = "ti,davinci_mdio";
428            reg = <0x32400 0x90>;
429            clocks = <&dpll_core_m4_ck>;
430            clock-names = "fck";
431            bus_freq = <1000000>;
432            #address-cells = <1>;
433            #size-cells = <0>;
434        };
435    };
436
437  - |
438
439    /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */
440    #include <dt-bindings/interrupt-controller/arm-gic.h>
441    pruss1: pruss@0 {
442        compatible = "ti,am4376-pruss1";
443        reg = <0x0 0x40000>;
444        #address-cells = <1>;
445        #size-cells = <1>;
446        ranges;
447
448        pruss1_mem: memories@0 {
449            reg = <0x0 0x2000>,
450                  <0x2000 0x2000>,
451                  <0x10000 0x8000>;
452            reg-names = "dram0", "dram1", "shrdram2";
453        };
454
455        pruss1_cfg: cfg@26000 {
456            compatible = "ti,pruss-cfg", "syscon";
457            #address-cells = <1>;
458            #size-cells = <1>;
459            reg = <0x26000 0x2000>;
460            ranges = <0x00 0x26000 0x2000>;
461
462            clocks {
463                #address-cells = <1>;
464                #size-cells = <0>;
465
466                pruss1_iepclk_mux: iepclk-mux@30 {
467                    reg = <0x30>;
468                    #clock-cells = <0>;
469                    clocks = <&sysclk_div>,     /* icss_iep */
470                             <&pruss_ocp_gclk>; /* icss_ocp */
471                };
472            };
473        };
474
475        pruss1_mii_rt: mii-rt@32000 {
476            compatible = "ti,pruss-mii", "syscon";
477            reg = <0x32000 0x58>;
478        };
479
480        pruss1_intc: interrupt-controller@20000 {
481            compatible = "ti,pruss-intc";
482            reg = <0x20000 0x2000>;
483            interrupt-controller;
484            #interrupt-cells = <3>;
485            interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
486                         <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
487                         <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
488                         <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
489                         <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
490                         <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
491                         <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
492            interrupt-names = "host_intr0", "host_intr1",
493                              "host_intr2", "host_intr3",
494                              "host_intr4",
495                              "host_intr6", "host_intr7";
496            ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
497        };
498
499        pru1_0: pru@34000 {
500            compatible = "ti,am4376-pru";
501            reg = <0x34000 0x3000>,
502                  <0x22000 0x400>,
503                  <0x22400 0x100>;
504            reg-names = "iram", "control", "debug";
505            firmware-name = "am437x-pru1_0-fw";
506        };
507
508        pru1_1: pru@38000 {
509            compatible = "ti,am4376-pru";
510            reg = <0x38000 0x3000>,
511                  <0x24000 0x400>,
512                  <0x24400 0x100>;
513            reg-names = "iram", "control", "debug";
514            firmware-name = "am437x-pru1_1-fw";
515        };
516
517        pruss1_mdio: mdio@32400 {
518            compatible = "ti,davinci_mdio";
519            reg = <0x32400 0x90>;
520            clocks = <&dpll_core_m4_ck>;
521            clock-names = "fck";
522            bus_freq = <1000000>;
523            #address-cells = <1>;
524            #size-cells = <0>;
525        };
526    };
527
528...
529