xref: /openbmc/linux/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml (revision 6e1456f9)

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Renesas RZ/V2M External Power Sequence Controller (PWC)

description: |+
  The PWC IP found in the RZ/V2M family of chips comes with the below
  capabilities
    - external power supply on/off sequence generation
    - on/off signal generation for the LPDDR4 core power supply (LPVDD)
    - key input signals processing
    - general-purpose output pins

maintainers:
  - Fabrizio Castro <fabrizio.castro.jz@renesas.com>

properties:
  compatible:
    items:
      - enum:
          - renesas,r9a09g011-pwc # RZ/V2M
          - renesas,r9a09g055-pwc # RZ/V2MA
      - const: renesas,rzv2m-pwc

  reg:
    maxItems: 1

  gpio-controller: true

  '#gpio-cells':
    const: 2

  renesas,rzv2m-pwc-power:
    description: The PWC is used to control the system power supplies.
    type: boolean

required:
  - compatible
  - reg
  - gpio-controller
  - '#gpio-cells'

additionalProperties: false

examples:
  - |
    pwc: pwc@a3700000 {
      compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc";
      reg = <0xa3700000 0x800>;
      gpio-controller;
      #gpio-cells = <2>;
      renesas,rzv2m-pwc-power;
    };