1*d00004c4SKrzysztof Kozlowski# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*d00004c4SKrzysztof Kozlowski%YAML 1.2 3*d00004c4SKrzysztof Kozlowski--- 4*d00004c4SKrzysztof Kozlowski$id: http://devicetree.org/schemas/soc/qcom/qcom,smsm.yaml# 5*d00004c4SKrzysztof Kozlowski$schema: http://devicetree.org/meta-schemas/core.yaml# 6*d00004c4SKrzysztof Kozlowski 7*d00004c4SKrzysztof Kozlowskititle: Qualcomm Shared Memory State Machine 8*d00004c4SKrzysztof Kozlowski 9*d00004c4SKrzysztof Kozlowskimaintainers: 10*d00004c4SKrzysztof Kozlowski - Andy Gross <agross@kernel.org> 11*d00004c4SKrzysztof Kozlowski - Bjorn Andersson <bjorn.andersson@linaro.org> 12*d00004c4SKrzysztof Kozlowski - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 13*d00004c4SKrzysztof Kozlowski 14*d00004c4SKrzysztof Kozlowskidescription: 15*d00004c4SKrzysztof Kozlowski The Shared Memory State Machine facilitates broadcasting of single bit state 16*d00004c4SKrzysztof Kozlowski information between the processors in a Qualcomm SoC. Each processor is 17*d00004c4SKrzysztof Kozlowski assigned 32 bits of state that can be modified. A processor can through a 18*d00004c4SKrzysztof Kozlowski matrix of bitmaps signal subscription of notifications upon changes to a 19*d00004c4SKrzysztof Kozlowski certain bit owned by a certain remote processor. 20*d00004c4SKrzysztof Kozlowski 21*d00004c4SKrzysztof Kozlowskiproperties: 22*d00004c4SKrzysztof Kozlowski compatible: 23*d00004c4SKrzysztof Kozlowski const: qcom,smsm 24*d00004c4SKrzysztof Kozlowski 25*d00004c4SKrzysztof Kozlowski '#address-cells': 26*d00004c4SKrzysztof Kozlowski const: 1 27*d00004c4SKrzysztof Kozlowski 28*d00004c4SKrzysztof Kozlowski qcom,local-host: 29*d00004c4SKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 30*d00004c4SKrzysztof Kozlowski default: 0 31*d00004c4SKrzysztof Kozlowski description: 32*d00004c4SKrzysztof Kozlowski Identifier of the local processor in the list of hosts, or in other words 33*d00004c4SKrzysztof Kozlowski specifier of the column in the subscription matrix representing the local 34*d00004c4SKrzysztof Kozlowski processor. 35*d00004c4SKrzysztof Kozlowski 36*d00004c4SKrzysztof Kozlowski '#size-cells': 37*d00004c4SKrzysztof Kozlowski const: 0 38*d00004c4SKrzysztof Kozlowski 39*d00004c4SKrzysztof KozlowskipatternProperties: 40*d00004c4SKrzysztof Kozlowski "^qcom,ipc-[1-4]$": 41*d00004c4SKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/phandle-array 42*d00004c4SKrzysztof Kozlowski items: 43*d00004c4SKrzysztof Kozlowski - items: 44*d00004c4SKrzysztof Kozlowski - description: phandle to a syscon node representing the APCS registers 45*d00004c4SKrzysztof Kozlowski - description: u32 representing offset to the register within the syscon 46*d00004c4SKrzysztof Kozlowski - description: u32 representing the ipc bit within the register 47*d00004c4SKrzysztof Kozlowski description: 48*d00004c4SKrzysztof Kozlowski Three entries specifying the outgoing ipc bit used for signaling the N:th 49*d00004c4SKrzysztof Kozlowski remote processor. 50*d00004c4SKrzysztof Kozlowski 51*d00004c4SKrzysztof Kozlowski "@[0-9a-f]$": 52*d00004c4SKrzysztof Kozlowski type: object 53*d00004c4SKrzysztof Kozlowski description: 54*d00004c4SKrzysztof Kozlowski Each processor's state bits are described by a subnode of the SMSM device 55*d00004c4SKrzysztof Kozlowski node. Nodes can either be flagged as an interrupt-controller to denote a 56*d00004c4SKrzysztof Kozlowski remote processor's state bits or the local processors bits. The node 57*d00004c4SKrzysztof Kozlowski names are not important. 58*d00004c4SKrzysztof Kozlowski 59*d00004c4SKrzysztof Kozlowski properties: 60*d00004c4SKrzysztof Kozlowski reg: 61*d00004c4SKrzysztof Kozlowski maxItems: 1 62*d00004c4SKrzysztof Kozlowski 63*d00004c4SKrzysztof Kozlowski interrupt-controller: 64*d00004c4SKrzysztof Kozlowski description: 65*d00004c4SKrzysztof Kozlowski Marks the entry as a interrupt-controller and the state bits to 66*d00004c4SKrzysztof Kozlowski belong to a remote processor. 67*d00004c4SKrzysztof Kozlowski 68*d00004c4SKrzysztof Kozlowski '#interrupt-cells': 69*d00004c4SKrzysztof Kozlowski const: 2 70*d00004c4SKrzysztof Kozlowski 71*d00004c4SKrzysztof Kozlowski interrupts: 72*d00004c4SKrzysztof Kozlowski maxItems: 1 73*d00004c4SKrzysztof Kozlowski description: 74*d00004c4SKrzysztof Kozlowski One entry specifying remote IRQ used by the remote processor to 75*d00004c4SKrzysztof Kozlowski signal changes of its state bits. 76*d00004c4SKrzysztof Kozlowski 77*d00004c4SKrzysztof Kozlowski '#qcom,smem-state-cells': 78*d00004c4SKrzysztof Kozlowski $ref: /schemas/types.yaml#/definitions/uint32 79*d00004c4SKrzysztof Kozlowski const: 1 80*d00004c4SKrzysztof Kozlowski description: 81*d00004c4SKrzysztof Kozlowski Required for local entry. Denotes bit number. 82*d00004c4SKrzysztof Kozlowski 83*d00004c4SKrzysztof Kozlowski required: 84*d00004c4SKrzysztof Kozlowski - reg 85*d00004c4SKrzysztof Kozlowski 86*d00004c4SKrzysztof Kozlowski oneOf: 87*d00004c4SKrzysztof Kozlowski - required: 88*d00004c4SKrzysztof Kozlowski - '#qcom,smem-state-cells' 89*d00004c4SKrzysztof Kozlowski - required: 90*d00004c4SKrzysztof Kozlowski - interrupt-controller 91*d00004c4SKrzysztof Kozlowski - '#interrupt-cells' 92*d00004c4SKrzysztof Kozlowski - interrupts 93*d00004c4SKrzysztof Kozlowski 94*d00004c4SKrzysztof Kozlowski additionalProperties: false 95*d00004c4SKrzysztof Kozlowski 96*d00004c4SKrzysztof Kozlowskirequired: 97*d00004c4SKrzysztof Kozlowski - compatible 98*d00004c4SKrzysztof Kozlowski - '#address-cells' 99*d00004c4SKrzysztof Kozlowski - '#size-cells' 100*d00004c4SKrzysztof Kozlowski 101*d00004c4SKrzysztof KozlowskianyOf: 102*d00004c4SKrzysztof Kozlowski - required: 103*d00004c4SKrzysztof Kozlowski - qcom,ipc-1 104*d00004c4SKrzysztof Kozlowski - required: 105*d00004c4SKrzysztof Kozlowski - qcom,ipc-2 106*d00004c4SKrzysztof Kozlowski - required: 107*d00004c4SKrzysztof Kozlowski - qcom,ipc-3 108*d00004c4SKrzysztof Kozlowski - required: 109*d00004c4SKrzysztof Kozlowski - qcom,ipc-4 110*d00004c4SKrzysztof Kozlowski 111*d00004c4SKrzysztof KozlowskiadditionalProperties: false 112*d00004c4SKrzysztof Kozlowski 113*d00004c4SKrzysztof Kozlowskiexamples: 114*d00004c4SKrzysztof Kozlowski # The following example shows the SMEM setup for controlling properties of 115*d00004c4SKrzysztof Kozlowski # the wireless processor, defined from the 8974 apps processor's 116*d00004c4SKrzysztof Kozlowski # point-of-view. It encompasses one outbound entry and the outgoing interrupt 117*d00004c4SKrzysztof Kozlowski # for the wireless processor. 118*d00004c4SKrzysztof Kozlowski - | 119*d00004c4SKrzysztof Kozlowski #include <dt-bindings/interrupt-controller/arm-gic.h> 120*d00004c4SKrzysztof Kozlowski 121*d00004c4SKrzysztof Kozlowski shared-memory { 122*d00004c4SKrzysztof Kozlowski compatible = "qcom,smsm"; 123*d00004c4SKrzysztof Kozlowski #address-cells = <1>; 124*d00004c4SKrzysztof Kozlowski #size-cells = <0>; 125*d00004c4SKrzysztof Kozlowski qcom,ipc-3 = <&apcs 8 19>; 126*d00004c4SKrzysztof Kozlowski 127*d00004c4SKrzysztof Kozlowski apps_smsm: apps@0 { 128*d00004c4SKrzysztof Kozlowski reg = <0>; 129*d00004c4SKrzysztof Kozlowski #qcom,smem-state-cells = <1>; 130*d00004c4SKrzysztof Kozlowski }; 131*d00004c4SKrzysztof Kozlowski 132*d00004c4SKrzysztof Kozlowski wcnss_smsm: wcnss@7 { 133*d00004c4SKrzysztof Kozlowski reg = <7>; 134*d00004c4SKrzysztof Kozlowski interrupts = <GIC_SPI 144 IRQ_TYPE_EDGE_RISING>; 135*d00004c4SKrzysztof Kozlowski interrupt-controller; 136*d00004c4SKrzysztof Kozlowski #interrupt-cells = <2>; 137*d00004c4SKrzysztof Kozlowski }; 138*d00004c4SKrzysztof Kozlowski }; 139