1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Atmel Timer Counter Block 8 9maintainers: 10 - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 12description: | 13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each 14 timer has three channels with two counters each. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - atmel,at91rm9200-tcb 21 - atmel,at91sam9x5-tcb 22 - const: simple-mfd 23 - const: syscon 24 25 reg: 26 maxItems: 1 27 28 interrupts: 29 description: 30 List of interrupts. One interrupt per TCB channel if available or one 31 interrupt for the TC block 32 minItems: 1 33 maxItems: 3 34 35 clock-names: 36 description: 37 List of clock names. Always includes t0_clk and slow clk. Also includes 38 t1_clk and t2_clk if a clock per channel is available. 39 oneOf: 40 - items: 41 - const: t0_clk 42 - const: slow_clk 43 - items: 44 - const: t0_clk 45 - const: t1_clk 46 - const: t2_clk 47 - const: slow_clk 48 minItems: 2 49 maxItems: 4 50 51 clocks: 52 minItems: 2 53 maxItems: 4 54 55 '#address-cells': 56 const: 1 57 58 '#size-cells': 59 const: 0 60 61patternProperties: 62 "^timer@[0-2]$": 63 description: The timer block channels that are used as timers. 64 type: object 65 properties: 66 compatible: 67 const: atmel,tcb-timer 68 reg: 69 description: 70 List of channels to use for this particular timer. 71 minItems: 1 72 maxItems: 3 73 74 required: 75 - compatible 76 - reg 77 78required: 79 - compatible 80 - reg 81 - interrupts 82 - clocks 83 - clock-names 84 - '#address-cells' 85 - '#size-cells' 86 87additionalProperties: false 88 89examples: 90 - | 91 /* One interrupt per TC block: */ 92 tcb0: timer@fff7c000 { 93 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 94 #address-cells = <1>; 95 #size-cells = <0>; 96 reg = <0xfff7c000 0x100>; 97 interrupts = <18 4>; 98 clocks = <&tcb0_clk>, <&clk32k>; 99 clock-names = "t0_clk", "slow_clk"; 100 101 timer@0 { 102 compatible = "atmel,tcb-timer"; 103 reg = <0>, <1>; 104 }; 105 106 timer@2 { 107 compatible = "atmel,tcb-timer"; 108 reg = <2>; 109 }; 110 }; 111 112 /* One interrupt per TC channel in a TC block: */ 113 tcb1: timer@fffdc000 { 114 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 115 #address-cells = <1>; 116 #size-cells = <0>; 117 reg = <0xfffdc000 0x100>; 118 interrupts = <26 4>, <27 4>, <28 4>; 119 clocks = <&tcb1_clk>, <&clk32k>; 120 clock-names = "t0_clk", "slow_clk"; 121 122 timer@0 { 123 compatible = "atmel,tcb-timer"; 124 reg = <0>; 125 }; 126 127 timer@1 { 128 compatible = "atmel,tcb-timer"; 129 reg = <1>; 130 }; 131 }; 132