1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Atmel Timer Counter Block 8 9maintainers: 10 - Alexandre Belloni <alexandre.belloni@bootlin.com> 11 12description: | 13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each 14 timer has three channels with two counters each. 15 16properties: 17 compatible: 18 items: 19 - enum: 20 - atmel,at91rm9200-tcb 21 - atmel,at91sam9x5-tcb 22 - atmel,sama5d2-tcb 23 - const: simple-mfd 24 - const: syscon 25 26 reg: 27 maxItems: 1 28 29 interrupts: 30 description: 31 List of interrupts. One interrupt per TCB channel if available or one 32 interrupt for the TC block 33 minItems: 1 34 maxItems: 3 35 36 clock-names: 37 description: 38 List of clock names. Always includes t0_clk and slow clk. Also includes 39 t1_clk and t2_clk if a clock per channel is available. 40 minItems: 2 41 maxItems: 4 42 43 clocks: 44 minItems: 2 45 maxItems: 4 46 47 '#address-cells': 48 const: 1 49 50 '#size-cells': 51 const: 0 52 53patternProperties: 54 "^timer@[0-2]$": 55 description: The timer block channels that are used as timers. 56 type: object 57 properties: 58 compatible: 59 const: atmel,tcb-timer 60 reg: 61 description: 62 List of channels to use for this particular timer. 63 minItems: 1 64 maxItems: 3 65 66 required: 67 - compatible 68 - reg 69 70allOf: 71 - if: 72 properties: 73 compatible: 74 contains: 75 const: atmel,sama5d2-tcb 76 then: 77 properties: 78 clocks: 79 minItems: 3 80 maxItems: 3 81 clock-names: 82 items: 83 - const: t0_clk 84 - const: gclk 85 - const: slow_clk 86 else: 87 properties: 88 clocks: 89 minItems: 2 90 maxItems: 4 91 clock-names: 92 oneOf: 93 - items: 94 - const: t0_clk 95 - const: slow_clk 96 - items: 97 - const: t0_clk 98 - const: t1_clk 99 - const: t2_clk 100 - const: slow_clk 101 102required: 103 - compatible 104 - reg 105 - interrupts 106 - clocks 107 - clock-names 108 - '#address-cells' 109 - '#size-cells' 110 111additionalProperties: false 112 113examples: 114 - | 115 /* One interrupt per TC block: */ 116 tcb0: timer@fff7c000 { 117 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 118 #address-cells = <1>; 119 #size-cells = <0>; 120 reg = <0xfff7c000 0x100>; 121 interrupts = <18 4>; 122 clocks = <&tcb0_clk>, <&clk32k>; 123 clock-names = "t0_clk", "slow_clk"; 124 125 timer@0 { 126 compatible = "atmel,tcb-timer"; 127 reg = <0>, <1>; 128 }; 129 130 timer@2 { 131 compatible = "atmel,tcb-timer"; 132 reg = <2>; 133 }; 134 }; 135 136 /* One interrupt per TC channel in a TC block: */ 137 tcb1: timer@fffdc000 { 138 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 139 #address-cells = <1>; 140 #size-cells = <0>; 141 reg = <0xfffdc000 0x100>; 142 interrupts = <26 4>, <27 4>, <28 4>; 143 clocks = <&tcb1_clk>, <&clk32k>; 144 clock-names = "t0_clk", "slow_clk"; 145 146 timer@0 { 147 compatible = "atmel,tcb-timer"; 148 reg = <0>; 149 }; 150 151 timer@1 { 152 compatible = "atmel,tcb-timer"; 153 reg = <1>; 154 }; 155 }; 156