1*ceb82ac2SLorenzo Bianconi# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*ceb82ac2SLorenzo Bianconi%YAML 1.2 3*ceb82ac2SLorenzo Bianconi--- 4*ceb82ac2SLorenzo Bianconi$id: http://devicetree.org/schemas/soc/mediatek/mediatek,mt7986-wo-ccif.yaml# 5*ceb82ac2SLorenzo Bianconi$schema: http://devicetree.org/meta-schemas/core.yaml# 6*ceb82ac2SLorenzo Bianconi 7*ceb82ac2SLorenzo Bianconititle: MediaTek Wireless Ethernet Dispatch (WED) WO controller interface for MT7986 8*ceb82ac2SLorenzo Bianconi 9*ceb82ac2SLorenzo Bianconimaintainers: 10*ceb82ac2SLorenzo Bianconi - Lorenzo Bianconi <lorenzo@kernel.org> 11*ceb82ac2SLorenzo Bianconi - Felix Fietkau <nbd@nbd.name> 12*ceb82ac2SLorenzo Bianconi 13*ceb82ac2SLorenzo Bianconidescription: 14*ceb82ac2SLorenzo Bianconi The MediaTek wo-ccif provides a configuration interface for WED WO 15*ceb82ac2SLorenzo Bianconi controller used to perfrom offload rx packet processing (e.g. 802.11 16*ceb82ac2SLorenzo Bianconi aggregation packet reordering or rx header translation) on MT7986 soc. 17*ceb82ac2SLorenzo Bianconi 18*ceb82ac2SLorenzo Bianconiproperties: 19*ceb82ac2SLorenzo Bianconi compatible: 20*ceb82ac2SLorenzo Bianconi items: 21*ceb82ac2SLorenzo Bianconi - enum: 22*ceb82ac2SLorenzo Bianconi - mediatek,mt7986-wo-ccif 23*ceb82ac2SLorenzo Bianconi - const: syscon 24*ceb82ac2SLorenzo Bianconi 25*ceb82ac2SLorenzo Bianconi reg: 26*ceb82ac2SLorenzo Bianconi maxItems: 1 27*ceb82ac2SLorenzo Bianconi 28*ceb82ac2SLorenzo Bianconi interrupts: 29*ceb82ac2SLorenzo Bianconi maxItems: 1 30*ceb82ac2SLorenzo Bianconi 31*ceb82ac2SLorenzo Bianconirequired: 32*ceb82ac2SLorenzo Bianconi - compatible 33*ceb82ac2SLorenzo Bianconi - reg 34*ceb82ac2SLorenzo Bianconi - interrupts 35*ceb82ac2SLorenzo Bianconi 36*ceb82ac2SLorenzo BianconiadditionalProperties: false 37*ceb82ac2SLorenzo Bianconi 38*ceb82ac2SLorenzo Bianconiexamples: 39*ceb82ac2SLorenzo Bianconi - | 40*ceb82ac2SLorenzo Bianconi #include <dt-bindings/interrupt-controller/arm-gic.h> 41*ceb82ac2SLorenzo Bianconi #include <dt-bindings/interrupt-controller/irq.h> 42*ceb82ac2SLorenzo Bianconi soc { 43*ceb82ac2SLorenzo Bianconi #address-cells = <2>; 44*ceb82ac2SLorenzo Bianconi #size-cells = <2>; 45*ceb82ac2SLorenzo Bianconi 46*ceb82ac2SLorenzo Bianconi syscon@151a5000 { 47*ceb82ac2SLorenzo Bianconi compatible = "mediatek,mt7986-wo-ccif", "syscon"; 48*ceb82ac2SLorenzo Bianconi reg = <0 0x151a5000 0 0x1000>; 49*ceb82ac2SLorenzo Bianconi interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>; 50*ceb82ac2SLorenzo Bianconi }; 51*ceb82ac2SLorenzo Bianconi }; 52