176a4f03fSEmil MedveQorIQ DPAA Queue Manager Device Tree Binding
276a4f03fSEmil Medve
376a4f03fSEmil MedveCopyright (C) 2008 - 2014 Freescale Semiconductor Inc.
476a4f03fSEmil Medve
576a4f03fSEmil MedveCONTENTS
676a4f03fSEmil Medve
776a4f03fSEmil Medve	- QMan Node
876a4f03fSEmil Medve	- QMan Private Memory Nodes
976a4f03fSEmil Medve	- Example
1076a4f03fSEmil Medve
1176a4f03fSEmil MedveQMan Node
1276a4f03fSEmil Medve
1376a4f03fSEmil MedveThe Queue Manager is part of the Data-Path Acceleration Architecture (DPAA). QMan
1476a4f03fSEmil Medvesupports queuing and QoS scheduling of frames to CPUs, network interfaces and
1576a4f03fSEmil MedveDPAA logic modules, maintains packet ordering within flows. Besides providing
1676a4f03fSEmil Medveflow-level queuing, is also responsible for congestion management functions such
1776a4f03fSEmil Medveas RED/WRED, congestion notifications and tail discards. This binding covers the
1876a4f03fSEmil MedveCCSR space programming model
1976a4f03fSEmil Medve
2076a4f03fSEmil MedvePROPERTIES
2176a4f03fSEmil Medve
2276a4f03fSEmil Medve- compatible
2376a4f03fSEmil Medve	Usage:		Required
2476a4f03fSEmil Medve	Value type:	<stringlist>
2576a4f03fSEmil Medve	Definition:	Must include "fsl,qman"
2676a4f03fSEmil Medve			May include "fsl,<SoC>-qman"
2776a4f03fSEmil Medve
2876a4f03fSEmil Medve- reg
2976a4f03fSEmil Medve	Usage:		Required
3076a4f03fSEmil Medve	Value type:	<prop-encoded-array>
3176a4f03fSEmil Medve	Definition:	Registers region within the CCSR address space
3276a4f03fSEmil Medve
3376a4f03fSEmil MedveThe QMan revision information is located in the QMAN_IP_REV_1/2 registers which
3476a4f03fSEmil Medveare located at offsets 0xbf8 and 0xbfc
3576a4f03fSEmil Medve
3676a4f03fSEmil Medve- interrupts
3776a4f03fSEmil Medve	Usage:		Required
3876a4f03fSEmil Medve	Value type:	<prop-encoded-array>
3976a4f03fSEmil Medve	Definition:	Standard property. The error interrupt
4076a4f03fSEmil Medve
417af98c7cSEmil Medve- fsl,qman-portals
427af98c7cSEmil Medve	Usage:		Required
437af98c7cSEmil Medve	Value type:	<phandle>
447af98c7cSEmil Medve	Definition:	Phandle to this QMan instance's portals
457af98c7cSEmil Medve
4676a4f03fSEmil Medve- fsl,liodn
4776a4f03fSEmil Medve	Usage:		See pamu.txt
4876a4f03fSEmil Medve	Value type:	<prop-encoded-array>
4976a4f03fSEmil Medve	Definition:	PAMU property used for static LIODN assignment
5076a4f03fSEmil Medve
5176a4f03fSEmil Medve- fsl,iommu-parent
5276a4f03fSEmil Medve	Usage:		See pamu.txt
5376a4f03fSEmil Medve	Value type:	<phandle>
5476a4f03fSEmil Medve	Definition:	PAMU property used for dynamic LIODN assignment
5576a4f03fSEmil Medve
5676a4f03fSEmil Medve	For additional details about the PAMU/LIODN binding(s) see pamu.txt
5776a4f03fSEmil Medve
5876a4f03fSEmil Medve- clocks
5976a4f03fSEmil Medve	Usage:		See clock-bindings.txt and qoriq-clock.txt
6076a4f03fSEmil Medve	Value type:	<prop-encoded-array>
6176a4f03fSEmil Medve	Definition:	Reference input clock. Its frequency is half of the
6276a4f03fSEmil Medve			platform clock
63d2101078SRoy Pledge- memory-regions
64d2101078SRoy Pledge	Usage:		Required for ARM
65d2101078SRoy Pledge	Value type:	<phandle array>
66d2101078SRoy Pledge	Definition:	List of phandles referencing the QMan private memory
67d2101078SRoy Pledge			nodes (described below). The qman-fqd node must be
68d2101078SRoy Pledge			first followed by qman-pfdr node. Only used on ARM
6976a4f03fSEmil Medve
7076a4f03fSEmil MedveDevices connected to a QMan instance via Direct Connect Portals (DCP) must link
7176a4f03fSEmil Medveto the respective QMan instance
7276a4f03fSEmil Medve
7376a4f03fSEmil Medve- fsl,qman
7476a4f03fSEmil Medve	Usage:		Required
7576a4f03fSEmil Medve	Value type:	<prop-encoded-array>
7676a4f03fSEmil Medve	Description:	List of phandle and DCP index pairs, to the QMan instance
7776a4f03fSEmil Medve			to which this device is connected via the DCP
7876a4f03fSEmil Medve
7976a4f03fSEmil MedveQMan Private Memory Nodes
8076a4f03fSEmil Medve
8176a4f03fSEmil MedveQMan requires two contiguous range of physical memory used for the backing store
8276a4f03fSEmil Medvefor QMan Frame Queue Descriptor (FQD) and Packed Frame Descriptor Record (PFDR).
83d2101078SRoy PledgeThis memory is reserved/allocated as a node under the /reserved-memory node.
84d2101078SRoy Pledge
85d2101078SRoy PledgeFor additional details about reserved memory regions see reserved-memory.txt
8676a4f03fSEmil Medve
8776a4f03fSEmil MedveThe QMan FQD memory node must be named "qman-fqd"
8876a4f03fSEmil Medve
8976a4f03fSEmil MedvePROPERTIES
9076a4f03fSEmil Medve
9176a4f03fSEmil Medve- compatible
9276a4f03fSEmil Medve	Usage:		required
9376a4f03fSEmil Medve	Value type:	<stringlist>
94d2101078SRoy Pledge	Definition:	PPC platforms: Must include "fsl,qman-fqd"
95d2101078SRoy Pledge			ARM platforms: Must include "shared-dma-pool"
96d2101078SRoy Pledge				       as well as the "no-map" property
9776a4f03fSEmil Medve
9876a4f03fSEmil MedveThe QMan PFDR memory node must be named "qman-pfdr"
9976a4f03fSEmil Medve
10076a4f03fSEmil MedvePROPERTIES
10176a4f03fSEmil Medve
10276a4f03fSEmil Medve- compatible
10376a4f03fSEmil Medve	Usage:		required
10476a4f03fSEmil Medve	Value type:	<stringlist>
105d2101078SRoy Pledge	Definition:	PPC platforms: Must include "fsl,qman-pfdr"
106d2101078SRoy Pledge			ARM platforms: Must include "shared-dma-pool"
107d2101078SRoy Pledge				       as well as the "no-map" property
10876a4f03fSEmil Medve
10976a4f03fSEmil MedveThe following constraints are relevant to the FQD and PFDR private memory:
11076a4f03fSEmil Medve	- The size must be 2^(size + 1), with size = 11..29. That is 4 KiB to
11176a4f03fSEmil Medve	  1 GiB
11276a4f03fSEmil Medve	- The alignment must be a muliptle of the memory size
11376a4f03fSEmil Medve
11476a4f03fSEmil MedveThe size of the FQD and PFDP must be chosen by observing the hardware features
11576a4f03fSEmil Medveconfigured via the Reset Configuration Word (RCW) and that are relevant to a
11676a4f03fSEmil Medvespecific board (e.g. number of MAC(s) pinned-out, number of offline/host command
11776a4f03fSEmil MedveFMan ports, etc.). The size configured in the DT must reflect the hardware
11876a4f03fSEmil Medvecapabilities and not the specific needs of an application
11976a4f03fSEmil Medve
12076a4f03fSEmil MedveFor additional details about reserved memory regions see reserved-memory.txt
12176a4f03fSEmil Medve
12276a4f03fSEmil MedveEXAMPLE
12376a4f03fSEmil Medve
12476a4f03fSEmil MedveThe example below shows a QMan FQD and a PFDR dynamic allocation memory nodes
12576a4f03fSEmil Medve
12676a4f03fSEmil Medve	reserved-memory {
12776a4f03fSEmil Medve		#address-cells = <2>;
12876a4f03fSEmil Medve		#size-cells = <2>;
12976a4f03fSEmil Medve		ranges;
13076a4f03fSEmil Medve
13176a4f03fSEmil Medve		qman_fqd: qman-fqd {
132d2101078SRoy Pledge			compatible = "shared-dma-pool";
13376a4f03fSEmil Medve			size = <0 0x400000>;
13476a4f03fSEmil Medve			alignment = <0 0x400000>;
135d2101078SRoy Pledge			no-map;
13676a4f03fSEmil Medve		};
13776a4f03fSEmil Medve		qman_pfdr: qman-pfdr {
138d2101078SRoy Pledge			compatible = "shared-dma-pool";
13976a4f03fSEmil Medve			size = <0 0x2000000>;
14076a4f03fSEmil Medve			alignment = <0 0x2000000>;
141d2101078SRoy Pledge			no-map;
14276a4f03fSEmil Medve		};
14376a4f03fSEmil Medve	};
14476a4f03fSEmil Medve
14576a4f03fSEmil MedveThe example below shows a (P4080) QMan CCSR-space node
14676a4f03fSEmil Medve
1477af98c7cSEmil Medve	qportals: qman-portals@ff4200000 {
1487af98c7cSEmil Medve		...
1497af98c7cSEmil Medve	};
1507af98c7cSEmil Medve
15176a4f03fSEmil Medve	clockgen: global-utilities@e1000 {
15276a4f03fSEmil Medve		...
15376a4f03fSEmil Medve		sysclk: sysclk {
15476a4f03fSEmil Medve			...
15576a4f03fSEmil Medve		};
15676a4f03fSEmil Medve		...
15776a4f03fSEmil Medve		platform_pll: platform-pll@c00 {
15876a4f03fSEmil Medve			#clock-cells = <1>;
15976a4f03fSEmil Medve			reg = <0xc00 0x4>;
16076a4f03fSEmil Medve			compatible = "fsl,qoriq-platform-pll-1.0";
16176a4f03fSEmil Medve			clocks = <&sysclk>;
16276a4f03fSEmil Medve			clock-output-names = "platform-pll", "platform-pll-div2";
16376a4f03fSEmil Medve		};
16476a4f03fSEmil Medve		...
16576a4f03fSEmil Medve	};
16676a4f03fSEmil Medve
16776a4f03fSEmil Medve	crypto@300000 {
16876a4f03fSEmil Medve		...
16976a4f03fSEmil Medve		fsl,qman = <&qman, 2>;
17076a4f03fSEmil Medve		...
17176a4f03fSEmil Medve	};
17276a4f03fSEmil Medve
17376a4f03fSEmil Medve	qman: qman@318000 {
17476a4f03fSEmil Medve		compatible = "fsl,qman";
17576a4f03fSEmil Medve		reg = <0x318000 0x1000>;
17676a4f03fSEmil Medve		interrupts = <16 2 1 3>
17776a4f03fSEmil Medve		fsl,liodn = <0x16>;
1787af98c7cSEmil Medve		fsl,qman-portals = <&qportals>;
17976a4f03fSEmil Medve		memory-region = <&qman_fqd &qman_pfdr>;
18076a4f03fSEmil Medve		clocks = <&platform_pll 1>;
18176a4f03fSEmil Medve	};
18276a4f03fSEmil Medve
18376a4f03fSEmil Medve	fman@400000 {
18476a4f03fSEmil Medve		...
18576a4f03fSEmil Medve		fsl,qman = <&qman, 0>;
18676a4f03fSEmil Medve		...
18776a4f03fSEmil Medve	};
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