10883c2c0SZhao Qiang* Parallel I/O Ports 20883c2c0SZhao Qiang 30883c2c0SZhao QiangThis node configures Parallel I/O ports for CPUs with QE support. 40883c2c0SZhao QiangThe node should reside in the "soc" node of the tree. For each 50883c2c0SZhao Qiangdevice that using parallel I/O ports, a child node should be created. 60883c2c0SZhao QiangSee the definition of the Pin configuration nodes below for more 70883c2c0SZhao Qianginformation. 80883c2c0SZhao Qiang 90883c2c0SZhao QiangRequired properties: 100883c2c0SZhao Qiang- device_type : should be "par_io". 110883c2c0SZhao Qiang- reg : offset to the register set and its length. 120883c2c0SZhao Qiang- num-ports : number of Parallel I/O ports 130883c2c0SZhao Qiang 140883c2c0SZhao QiangExample: 150883c2c0SZhao Qiangpar_io@1400 { 160883c2c0SZhao Qiang reg = <1400 100>; 170883c2c0SZhao Qiang #address-cells = <1>; 180883c2c0SZhao Qiang #size-cells = <0>; 190883c2c0SZhao Qiang device_type = "par_io"; 200883c2c0SZhao Qiang num-ports = <7>; 2148c926cdSMarco Franchi ucc_pin@1 { 220883c2c0SZhao Qiang ...... 230883c2c0SZhao Qiang }; 240883c2c0SZhao Qiang 250883c2c0SZhao QiangNote that "par_io" nodes are obsolete, and should not be used for 260883c2c0SZhao Qiangthe new device trees. Instead, each Par I/O bank should be represented 270883c2c0SZhao Qiangvia its own gpio-controller node: 280883c2c0SZhao Qiang 290883c2c0SZhao QiangRequired properties: 300883c2c0SZhao Qiang- #gpio-cells : should be "2". 310883c2c0SZhao Qiang- compatible : should be "fsl,<chip>-qe-pario-bank", 320883c2c0SZhao Qiang "fsl,mpc8323-qe-pario-bank". 330883c2c0SZhao Qiang- reg : offset to the register set and its length. 340883c2c0SZhao Qiang- gpio-controller : node to identify gpio controllers. 350883c2c0SZhao Qiang 360883c2c0SZhao QiangExample: 370883c2c0SZhao Qiang qe_pio_a: gpio-controller@1400 { 380883c2c0SZhao Qiang #gpio-cells = <2>; 390883c2c0SZhao Qiang compatible = "fsl,mpc8360-qe-pario-bank", 400883c2c0SZhao Qiang "fsl,mpc8323-qe-pario-bank"; 410883c2c0SZhao Qiang reg = <0x1400 0x18>; 420883c2c0SZhao Qiang gpio-controller; 430883c2c0SZhao Qiang }; 440883c2c0SZhao Qiang 450883c2c0SZhao Qiang qe_pio_e: gpio-controller@1460 { 460883c2c0SZhao Qiang #gpio-cells = <2>; 470883c2c0SZhao Qiang compatible = "fsl,mpc8360-qe-pario-bank", 480883c2c0SZhao Qiang "fsl,mpc8323-qe-pario-bank"; 490883c2c0SZhao Qiang reg = <0x1460 0x18>; 500883c2c0SZhao Qiang gpio-controller; 510883c2c0SZhao Qiang }; 52