1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Synopsys DesignWare ABP UART
8
9maintainers:
10  - Rob Herring <robh@kernel.org>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,r9a06g032-uart
21              - renesas,r9a06g033-uart
22          - const: renesas,rzn1-uart
23      - items:
24          - enum:
25              - rockchip,px30-uart
26              - rockchip,rk1808-uart
27              - rockchip,rk3036-uart
28              - rockchip,rk3066-uart
29              - rockchip,rk3128-uart
30              - rockchip,rk3188-uart
31              - rockchip,rk3288-uart
32              - rockchip,rk3308-uart
33              - rockchip,rk3328-uart
34              - rockchip,rk3368-uart
35              - rockchip,rk3399-uart
36              - rockchip,rk3568-uart
37              - rockchip,rk3588-uart
38              - rockchip,rv1108-uart
39              - rockchip,rv1126-uart
40          - const: snps,dw-apb-uart
41      - items:
42          - enum:
43              - brcm,bcm11351-dw-apb-uart
44              - brcm,bcm21664-dw-apb-uart
45          - const: snps,dw-apb-uart
46      - items:
47          - enum:
48              - starfive,jh7100-hsuart
49              - starfive,jh7100-uart
50          - const: snps,dw-apb-uart
51      - const: snps,dw-apb-uart
52
53  reg:
54    maxItems: 1
55
56  interrupts:
57    maxItems: 1
58
59  clock-frequency: true
60
61  clocks:
62    minItems: 1
63    maxItems: 2
64
65  clock-names:
66    items:
67      - const: baudclk
68      - const: apb_pclk
69
70  snps,uart-16550-compatible:
71    description: reflects the value of UART_16550_COMPATIBLE configuration
72      parameter. Define this if your UART does not implement the busy functionality.
73    type: boolean
74
75  resets:
76    maxItems: 1
77
78  reg-shift: true
79
80  reg-io-width: true
81
82  dcd-override:
83    description: Override the DCD modem status signal. This signal will
84      always be reported as active instead of being obtained from the modem
85      status register. Define this if your serial port does not use this
86      pin.
87    type: boolean
88
89  dsr-override:
90    description: Override the DTS modem status signal. This signal will
91      always be reported as active instead of being obtained from the modem
92      status register. Define this if your serial port does not use this
93      pin.
94    type: boolean
95
96  cts-override:
97    description: Override the CTS modem status signal. This signal will
98      always be reported as active instead of being obtained from the modem
99      status register. Define this if your serial port does not use this
100      pin.
101    type: boolean
102
103  ri-override:
104    description: Override the RI modem status signal. This signal will always
105      be reported as inactive instead of being obtained from the modem status
106      register. Define this if your serial port does not use this pin.
107    type: boolean
108
109required:
110  - compatible
111  - reg
112  - interrupts
113
114unevaluatedProperties: false
115
116examples:
117  - |
118    serial@80230000 {
119      compatible = "snps,dw-apb-uart";
120      reg = <0x80230000 0x100>;
121      clock-frequency = <3686400>;
122      interrupts = <10>;
123      reg-shift = <2>;
124      reg-io-width = <4>;
125      dcd-override;
126      dsr-override;
127      cts-override;
128      ri-override;
129    };
130
131  - |
132    // Example with one clock:
133    serial@80230000 {
134      compatible = "snps,dw-apb-uart";
135      reg = <0x80230000 0x100>;
136      clocks = <&baudclk>;
137      interrupts = <10>;
138      reg-shift = <2>;
139      reg-io-width = <4>;
140    };
141
142  - |
143    // Example with two clocks:
144    serial@80230000 {
145      compatible = "snps,dw-apb-uart";
146      reg = <0x80230000 0x100>;
147      clocks = <&baudclk>, <&apb_pclk>;
148      clock-names = "baudclk", "apb_pclk";
149      interrupts = <10>;
150      reg-shift = <2>;
151      reg-io-width = <4>;
152    };
153...
154