1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/serial/samsung_uart.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11  - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
12
13description: |+
14  Each Samsung UART should have an alias correctly numbered in the "aliases"
15  node, according to serialN format, where N is the port number (non-negative
16  decimal integer) as specified by User's Manual of respective SoC.
17
18properties:
19  compatible:
20    oneOf:
21      - items:
22          - const: samsung,exynosautov9-uart
23          - const: samsung,exynos850-uart
24      - enum:
25          - apple,s5l-uart
26          - axis,artpec8-uart
27          - samsung,s3c2410-uart
28          - samsung,s3c2412-uart
29          - samsung,s3c2440-uart
30          - samsung,s3c6400-uart
31          - samsung,s5pv210-uart
32          - samsung,exynos4210-uart
33          - samsung,exynos5433-uart
34          - samsung,exynos850-uart
35
36  reg:
37    maxItems: 1
38
39  reg-io-width:
40    description: |
41      The size (in bytes) of the IO accesses that should be performed
42      on the device.
43    $ref: /schemas/types.yaml#/definitions/uint32
44    enum: [ 1, 4 ]
45
46  clocks:
47    minItems: 2
48    maxItems: 5
49
50  clock-names:
51    description: N = 0 is allowed for SoCs without internal baud clock mux.
52    minItems: 2
53    items:
54      - const: uart
55      - pattern: '^clk_uart_baud[0-3]$'
56      - pattern: '^clk_uart_baud[0-3]$'
57      - pattern: '^clk_uart_baud[0-3]$'
58      - pattern: '^clk_uart_baud[0-3]$'
59
60  dmas:
61    items:
62      - description: DMA controller phandle and request line for RX
63      - description: DMA controller phandle and request line for TX
64
65  dma-names:
66    items:
67      - const: rx
68      - const: tx
69
70  interrupts:
71    description: RX interrupt and optionally TX interrupt.
72    minItems: 1
73    maxItems: 2
74
75  samsung,uart-fifosize:
76    description: The fifo size supported by the UART channel.
77    $ref: /schemas/types.yaml#/definitions/uint32
78    enum: [16, 64, 256]
79
80required:
81  - compatible
82  - clocks
83  - clock-names
84  - interrupts
85  - reg
86
87unevaluatedProperties: false
88
89allOf:
90  - $ref: serial.yaml#
91
92  - if:
93      properties:
94        compatible:
95          contains:
96            enum:
97              - samsung,s3c2410-uart
98              - samsung,s5pv210-uart
99    then:
100      properties:
101        clocks:
102          minItems: 2
103          maxItems: 3
104        clock-names:
105          minItems: 2
106          items:
107            - const: uart
108            - pattern: '^clk_uart_baud[0-1]$'
109            - pattern: '^clk_uart_baud[0-1]$'
110
111  - if:
112      properties:
113        compatible:
114          contains:
115            enum:
116              - apple,s5l-uart
117              - axis,artpec8-uart
118              - samsung,exynos4210-uart
119              - samsung,exynos5433-uart
120    then:
121      properties:
122        clocks:
123          maxItems: 2
124        clock-names:
125          items:
126            - const: uart
127            - const: clk_uart_baud0
128
129examples:
130  - |
131    #include <dt-bindings/clock/samsung,s3c64xx-clock.h>
132
133    uart0: serial@7f005000 {
134        compatible = "samsung,s3c6400-uart";
135        reg = <0x7f005000 0x100>;
136        interrupt-parent = <&vic1>;
137        interrupts = <5>;
138        clock-names = "uart", "clk_uart_baud2",
139                      "clk_uart_baud3";
140        clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
141                 <&clocks SCLK_UART>;
142        samsung,uart-fifosize = <16>;
143    };
144