1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/serial/renesas,scif.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: Renesas Serial Communication Interface with FIFO (SCIF)
8
9maintainers:
10  - Geert Uytterhoeven <geert+renesas@glider.be>
11
12allOf:
13  - $ref: serial.yaml#
14
15properties:
16  compatible:
17    oneOf:
18      - items:
19          - enum:
20              - renesas,scif-r7s72100     # RZ/A1H
21          - const: renesas,scif           # generic SCIF compatible UART
22
23      - items:
24          - enum:
25              - renesas,scif-r7s9210      # RZ/A2
26
27      - items:
28          - enum:
29              - renesas,scif-r8a7778      # R-Car M1
30              - renesas,scif-r8a7779      # R-Car H1
31          - const: renesas,rcar-gen1-scif # R-Car Gen1
32          - const: renesas,scif           # generic SCIF compatible UART
33
34      - items:
35          - enum:
36              - renesas,scif-r8a7742      # RZ/G1H
37              - renesas,scif-r8a7743      # RZ/G1M
38              - renesas,scif-r8a7744      # RZ/G1N
39              - renesas,scif-r8a7745      # RZ/G1E
40              - renesas,scif-r8a77470     # RZ/G1C
41              - renesas,scif-r8a7790      # R-Car H2
42              - renesas,scif-r8a7791      # R-Car M2-W
43              - renesas,scif-r8a7792      # R-Car V2H
44              - renesas,scif-r8a7793      # R-Car M2-N
45              - renesas,scif-r8a7794      # R-Car E2
46          - const: renesas,rcar-gen2-scif # R-Car Gen2 and RZ/G1
47          - const: renesas,scif           # generic SCIF compatible UART
48
49      - items:
50          - enum:
51              - renesas,scif-r8a774a1     # RZ/G2M
52              - renesas,scif-r8a774b1     # RZ/G2N
53              - renesas,scif-r8a774c0     # RZ/G2E
54              - renesas,scif-r8a774e1     # RZ/G2H
55              - renesas,scif-r8a7795      # R-Car H3
56              - renesas,scif-r8a7796      # R-Car M3-W
57              - renesas,scif-r8a77961     # R-Car M3-W+
58              - renesas,scif-r8a77965     # R-Car M3-N
59              - renesas,scif-r8a77970     # R-Car V3M
60              - renesas,scif-r8a77980     # R-Car V3H
61              - renesas,scif-r8a77990     # R-Car E3
62              - renesas,scif-r8a77995     # R-Car D3
63          - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
64          - const: renesas,scif           # generic SCIF compatible UART
65
66  reg:
67    maxItems: 1
68
69  interrupts:
70    oneOf:
71      - items:
72          - description: A combined interrupt
73      - items:
74          - description: Error interrupt
75          - description: Receive buffer full interrupt
76          - description: Transmit buffer empty interrupt
77          - description: Transmit End interrupt
78      - items:
79          - description: Error interrupt
80          - description: Receive buffer full interrupt
81          - description: Transmit buffer empty interrupt
82          - description: Break interrupt
83          - description: Data Ready interrupt
84          - description: Transmit End interrupt
85
86  interrupt-names:
87    oneOf:
88      - items:
89          - const: eri
90          - const: rxi
91          - const: txi
92          - const: tei
93      - items:
94          - const: eri
95          - const: rxi
96          - const: txi
97          - const: bri
98          - const: dri
99          - const: tei
100
101  clocks:
102    minItems: 1
103    maxItems: 4
104
105  clock-names:
106    minItems: 1
107    maxItems: 4
108    items:
109      enum:
110        - fck # UART functional clock
111        - sck # optional external clock input
112        - brg_int # optional internal clock source for BRG frequency divider
113        - scif_clk # optional external clock source for BRG frequency divider
114
115  power-domains:
116    maxItems: 1
117
118  resets:
119    maxItems: 1
120
121  dmas:
122    description:
123      Must contain a list of pairs of references to DMA specifiers, one for
124      transmission, and one for reception.
125
126  dma-names:
127    minItems: 2
128    maxItems: 4
129    items:
130      enum:
131        - tx
132        - rx
133
134required:
135  - compatible
136  - reg
137  - interrupts
138  - clocks
139  - clock-names
140  - power-domains
141
142if:
143  properties:
144    compatible:
145      contains:
146        enum:
147          - renesas,rcar-gen2-scif
148          - renesas,rcar-gen3-scif
149then:
150  required:
151    - resets
152
153unevaluatedProperties: false
154
155examples:
156  - |
157    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
158    #include <dt-bindings/interrupt-controller/arm-gic.h>
159    #include <dt-bindings/power/r8a7791-sysc.h>
160    aliases {
161            serial0 = &scif0;
162    };
163
164    scif0: serial@e6e60000 {
165            compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif",
166                         "renesas,scif";
167            reg = <0xe6e60000 64>;
168            interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
169            clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
170                     <&scif_clk>;
171            clock-names = "fck", "brg_int", "scif_clk";
172            dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x29>, <&dmac1 0x2a>;
173            dma-names = "tx", "rx", "tx", "rx";
174            power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
175            resets = <&cpg 721>;
176    };
177