1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/serial/renesas,sci.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Renesas Serial Communication Interface 8 9maintainers: 10 - Geert Uytterhoeven <geert+renesas@glider.be> 11 12allOf: 13 - $ref: serial.yaml# 14 15properties: 16 compatible: 17 oneOf: 18 - items: 19 - enum: 20 - renesas,r9a07g044-sci # RZ/G2{L,LC} 21 - const: renesas,sci # generic SCI compatible UART 22 23 - items: 24 - const: renesas,sci # generic SCI compatible UART 25 26 reg: 27 maxItems: 1 28 29 interrupts: 30 items: 31 - description: Error interrupt 32 - description: Receive buffer full interrupt 33 - description: Transmit buffer empty interrupt 34 - description: Transmit end interrupt 35 36 interrupt-names: 37 items: 38 - const: eri 39 - const: rxi 40 - const: txi 41 - const: tei 42 43 clocks: 44 minItems: 1 45 maxItems: 2 46 47 clock-names: 48 minItems: 1 49 maxItems: 2 50 items: 51 enum: 52 - fck # UART functional clock 53 - sck # optional external clock input 54 55 uart-has-rtscts: false 56 57required: 58 - compatible 59 - reg 60 - interrupts 61 - clocks 62 - clock-names 63 64if: 65 properties: 66 compatible: 67 contains: 68 enum: 69 - renesas,r9a07g044-sci 70then: 71 properties: 72 resets: 73 maxItems: 1 74 75 power-domains: 76 maxItems: 1 77 78 required: 79 - resets 80 - power-domains 81 82unevaluatedProperties: false 83 84examples: 85 - | 86 #include <dt-bindings/clock/r9a07g044-cpg.h> 87 #include <dt-bindings/interrupt-controller/arm-gic.h> 88 89 aliases { 90 serial0 = &sci0; 91 }; 92 93 sci0: serial@1004d000 { 94 compatible = "renesas,r9a07g044-sci", "renesas,sci"; 95 reg = <0x1004d000 0x400>; 96 interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>, 97 <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 98 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 99 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 100 interrupt-names = "eri", "rxi", "txi", "tei"; 101 clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>; 102 clock-names = "fck"; 103 power-domains = <&cpg>; 104 resets = <&cpg R9A07G044_SCI0_RST>; 105 }; 106