1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/serial/mediatek,uart.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek Universal Asynchronous Receiver/Transmitter (UART) 8 9maintainers: 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 12allOf: 13 - $ref: serial.yaml# 14 15description: | 16 The MediaTek UART is based on the basic 8250 UART and compatible 17 with 16550A, with enhancements for high speed baud rates and 18 support for DMA. 19 20properties: 21 compatible: 22 oneOf: 23 - const: mediatek,mt6577-uart 24 - items: 25 - enum: 26 - mediatek,mt2701-uart 27 - mediatek,mt2712-uart 28 - mediatek,mt6580-uart 29 - mediatek,mt6582-uart 30 - mediatek,mt6589-uart 31 - mediatek,mt6755-uart 32 - mediatek,mt6765-uart 33 - mediatek,mt6779-uart 34 - mediatek,mt6795-uart 35 - mediatek,mt6797-uart 36 - mediatek,mt7622-uart 37 - mediatek,mt7623-uart 38 - mediatek,mt7629-uart 39 - mediatek,mt7986-uart 40 - mediatek,mt8127-uart 41 - mediatek,mt8135-uart 42 - mediatek,mt8173-uart 43 - mediatek,mt8183-uart 44 - mediatek,mt8186-uart 45 - mediatek,mt8188-uart 46 - mediatek,mt8192-uart 47 - mediatek,mt8195-uart 48 - mediatek,mt8516-uart 49 - const: mediatek,mt6577-uart 50 51 reg: 52 description: The base address of the UART register bank 53 maxItems: 1 54 55 clocks: 56 minItems: 1 57 items: 58 - description: The clock the baudrate is derived from 59 - description: The bus clock for register accesses 60 61 clock-names: 62 minItems: 1 63 items: 64 - const: baud 65 - const: bus 66 67 dmas: 68 items: 69 - description: phandle to TX DMA 70 - description: phandle to RX DMA 71 72 dma-names: 73 items: 74 - const: tx 75 - const: rx 76 77 interrupts: 78 minItems: 1 79 maxItems: 2 80 81 interrupt-names: 82 description: 83 The UART interrupt and optionally the RX in-band wakeup interrupt. 84 minItems: 1 85 items: 86 - const: uart 87 - const: wakeup 88 89 pinctrl-0: true 90 pinctrl-1: true 91 92 pinctrl-names: 93 minItems: 1 94 items: 95 - const: default 96 - const: sleep 97 98required: 99 - compatible 100 - reg 101 - clocks 102 - interrupts 103 104unevaluatedProperties: false 105 106examples: 107 - | 108 #include <dt-bindings/interrupt-controller/arm-gic.h> 109 110 serial@11006000 { 111 compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart"; 112 reg = <0x11006000 0x400>; 113 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>, 114 <GIC_SPI 52 IRQ_TYPE_EDGE_FALLING>; 115 interrupt-names = "uart", "wakeup"; 116 clocks = <&uart_clk>, <&bus_clk>; 117 clock-names = "baud", "bus"; 118 pinctrl-0 = <&uart_pin>; 119 pinctrl-1 = <&uart_pin_sleep>; 120 pinctrl-names = "default", "sleep"; 121 }; 122