124779617SJohn CrispinLantiq SoC ASC serial controller 224779617SJohn Crispin 324779617SJohn CrispinRequired properties: 424779617SJohn Crispin- compatible : Should be "lantiq,asc" 524779617SJohn Crispin- reg : Address and length of the register set for the device 624779617SJohn Crispin- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier 724779617SJohn Crispin depends on the interrupt-parent interrupt controller. 824779617SJohn Crispin 9275d924bSSongjun WuOptional properties: 10275d924bSSongjun Wu- clocks: Should contain frequency clock and gate clock 11275d924bSSongjun Wu- clock-names: Should be "freq" and "asc" 12275d924bSSongjun Wu 1324779617SJohn CrispinExample: 1424779617SJohn Crispin 15275d924bSSongjun Wuasc0: serial@16600000 { 16275d924bSSongjun Wu compatible = "lantiq,asc"; 17275d924bSSongjun Wu reg = <0x16600000 0x100000>; 18275d924bSSongjun Wu interrupt-parent = <&gic>; 19275d924bSSongjun Wu interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>, 20275d924bSSongjun Wu <GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>, 21275d924bSSongjun Wu <GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>; 22275d924bSSongjun Wu clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>; 23275d924bSSongjun Wu clock-names = "freq", "asc"; 24275d924bSSongjun Wu}; 25275d924bSSongjun Wu 26afc3bca4SRob Herringasc1: serial@e100c00 { 2724779617SJohn Crispin compatible = "lantiq,asc"; 2824779617SJohn Crispin reg = <0xE100C00 0x400>; 2924779617SJohn Crispin interrupt-parent = <&icu0>; 3024779617SJohn Crispin interrupts = <112 113 114>; 3124779617SJohn Crispin}; 32