1ebd35674SAnson Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2ebd35674SAnson Huang%YAML 1.2
3ebd35674SAnson Huang---
4ebd35674SAnson Huang$id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
5ebd35674SAnson Huang$schema: http://devicetree.org/meta-schemas/core.yaml#
6ebd35674SAnson Huang
7ebd35674SAnson Huangtitle: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
8ebd35674SAnson Huang
9ebd35674SAnson Huangmaintainers:
1081004f0bSFabio Estevam  - Fabio Estevam <festevam@gmail.com>
11ebd35674SAnson Huang
12ebd35674SAnson HuangallOf:
13eec2c477SKrzysztof Kozlowski  - $ref: serial.yaml#
14eec2c477SKrzysztof Kozlowski  - $ref: rs485.yaml#
15ebd35674SAnson Huang
16ebd35674SAnson Huangproperties:
17ebd35674SAnson Huang  compatible:
18ebd35674SAnson Huang    oneOf:
19ebd35674SAnson Huang      - const: fsl,imx1-uart
20ebd35674SAnson Huang      - const: fsl,imx21-uart
21ebd35674SAnson Huang      - items:
22ebd35674SAnson Huang          - enum:
23ebd35674SAnson Huang              - fsl,imx25-uart
24ebd35674SAnson Huang              - fsl,imx27-uart
25ebd35674SAnson Huang              - fsl,imx31-uart
26ebd35674SAnson Huang              - fsl,imx35-uart
27ebd35674SAnson Huang              - fsl,imx50-uart
28ebd35674SAnson Huang              - fsl,imx51-uart
297a64ed02SKrzysztof Kozlowski              - fsl,imx53-uart
307a64ed02SKrzysztof Kozlowski              - fsl,imx6q-uart
31ebd35674SAnson Huang          - const: fsl,imx21-uart
32ebd35674SAnson Huang      - items:
33ebd35674SAnson Huang          - enum:
34ebd35674SAnson Huang              - fsl,imx6sl-uart
35ebd35674SAnson Huang              - fsl,imx6sll-uart
36ebd35674SAnson Huang              - fsl,imx6sx-uart
377a64ed02SKrzysztof Kozlowski          - const: fsl,imx6q-uart
387a64ed02SKrzysztof Kozlowski          - const: fsl,imx21-uart
397a64ed02SKrzysztof Kozlowski      - items:
407a64ed02SKrzysztof Kozlowski          - enum:
41ebd35674SAnson Huang              - fsl,imx6ul-uart
42ebd35674SAnson Huang              - fsl,imx7d-uart
43669e8aa3SKrzysztof Kozlowski              - fsl,imx8mm-uart
44669e8aa3SKrzysztof Kozlowski              - fsl,imx8mn-uart
45669e8aa3SKrzysztof Kozlowski              - fsl,imx8mp-uart
46669e8aa3SKrzysztof Kozlowski              - fsl,imx8mq-uart
47ebd35674SAnson Huang          - const: fsl,imx6q-uart
48ebd35674SAnson Huang
49ebd35674SAnson Huang  reg:
50ebd35674SAnson Huang    maxItems: 1
51ebd35674SAnson Huang
52*cf8d4027SMarek Vasut  dmas:
53*cf8d4027SMarek Vasut    items:
54*cf8d4027SMarek Vasut      - description: DMA controller phandle and request line for RX
55*cf8d4027SMarek Vasut      - description: DMA controller phandle and request line for TX
56*cf8d4027SMarek Vasut
57*cf8d4027SMarek Vasut  dma-names:
58*cf8d4027SMarek Vasut    items:
59*cf8d4027SMarek Vasut      - const: rx
60*cf8d4027SMarek Vasut      - const: tx
61*cf8d4027SMarek Vasut
62ebd35674SAnson Huang  interrupts:
63ebd35674SAnson Huang    maxItems: 1
64ebd35674SAnson Huang
65ebd35674SAnson Huang  fsl,dte-mode:
66ebd35674SAnson Huang    $ref: /schemas/types.yaml#/definitions/flag
67ebd35674SAnson Huang    description: |
68ebd35674SAnson Huang      Indicate the uart works in DTE mode. The uart works in DCE mode by default.
69ebd35674SAnson Huang
70ebd35674SAnson Huang  fsl,inverted-tx:
71ebd35674SAnson Huang    $ref: /schemas/types.yaml#/definitions/flag
72ebd35674SAnson Huang    description: |
73ebd35674SAnson Huang      Indicate that the hardware attached to the peripheral inverts the signal
74ebd35674SAnson Huang      transmitted, and that the peripheral should invert its output using the
75ebd35674SAnson Huang      INVT registers.
76ebd35674SAnson Huang
77ebd35674SAnson Huang  fsl,inverted-rx:
78ebd35674SAnson Huang    $ref: /schemas/types.yaml#/definitions/flag
79ebd35674SAnson Huang    description: |
80ebd35674SAnson Huang      Indicate that the hardware attached to the peripheral inverts the signal
81ebd35674SAnson Huang      received, and that the peripheral should invert its input using the
82ebd35674SAnson Huang      INVR registers.
83ebd35674SAnson Huang
84db0a196bSFabien Lahoudere  fsl,dma-info:
85db0a196bSFabien Lahoudere    $ref: /schemas/types.yaml#/definitions/uint32-array
86db0a196bSFabien Lahoudere    minItems: 2
87db0a196bSFabien Lahoudere    maxItems: 2
88db0a196bSFabien Lahoudere    description: |
89db0a196bSFabien Lahoudere      First cell contains the size of DMA buffer chunks, second cell contains
90db0a196bSFabien Lahoudere      the amount of chunks used for the device. Multiplying both numbers is
91db0a196bSFabien Lahoudere      the total size of memory used for receiving data.
92db0a196bSFabien Lahoudere      When not being configured the system will use default settings, which
93db0a196bSFabien Lahoudere      are sensible for most use cases. If you need low latency processing on
94db0a196bSFabien Lahoudere      slow connections this needs to be configured appropriately.
95db0a196bSFabien Lahoudere
96ebd35674SAnson Huangrequired:
97ebd35674SAnson Huang  - compatible
98ebd35674SAnson Huang  - reg
99ebd35674SAnson Huang  - interrupts
100ebd35674SAnson Huang
101ebd35674SAnson HuangunevaluatedProperties: false
102ebd35674SAnson Huang
103ebd35674SAnson Huangexamples:
104ebd35674SAnson Huang  - |
105ebd35674SAnson Huang    aliases {
106ebd35674SAnson Huang        serial0 = &uart1;
107ebd35674SAnson Huang    };
108ebd35674SAnson Huang
109ebd35674SAnson Huang    uart1: serial@73fbc000 {
110ebd35674SAnson Huang        compatible = "fsl,imx51-uart", "fsl,imx21-uart";
111ebd35674SAnson Huang        reg = <0x73fbc000 0x4000>;
112ebd35674SAnson Huang        interrupts = <31>;
113*cf8d4027SMarek Vasut        dmas = <&sdma 18 4 1>, <&sdma 19 4 2>;
114*cf8d4027SMarek Vasut        dma-names = "rx", "tx";
115ebd35674SAnson Huang        uart-has-rtscts;
116ebd35674SAnson Huang        fsl,dte-mode;
117ebd35674SAnson Huang    };
118