192a2c6b2SChristophe Ricard* STMicroelectronics SAS. ST33ZP24 TPM SoC 292a2c6b2SChristophe Ricard 392a2c6b2SChristophe RicardRequired properties: 492a2c6b2SChristophe Ricard- compatible: Should be "st,st33zp24-spi". 592a2c6b2SChristophe Ricard- spi-max-frequency: Maximum SPI frequency (<= 10000000). 692a2c6b2SChristophe Ricard 792a2c6b2SChristophe RicardOptional ST33ZP24 Properties: 892a2c6b2SChristophe Ricard- interrupt-parent: phandle for the interrupt gpio controller 992a2c6b2SChristophe Ricard- interrupts: GPIO interrupt to which the chip is connected 1092a2c6b2SChristophe Ricard- lpcpd-gpios: Output GPIO pin used for ST33ZP24 power management D1/D2 state. 1192a2c6b2SChristophe RicardIf set, power must be present when the platform is going into sleep/hibernate mode. 1292a2c6b2SChristophe Ricard 1392a2c6b2SChristophe RicardOptional SoC Specific Properties: 1492a2c6b2SChristophe Ricard- pinctrl-names: Contains only one value - "default". 1592a2c6b2SChristophe Ricard- pintctrl-0: Specifies the pin control groups used for this controller. 1692a2c6b2SChristophe Ricard 1792a2c6b2SChristophe RicardExample (for ARM-based BeagleBoard xM with ST33ZP24 on SPI4): 1892a2c6b2SChristophe Ricard 1992a2c6b2SChristophe Ricard&mcspi4 { 2092a2c6b2SChristophe Ricard 2192a2c6b2SChristophe Ricard status = "okay"; 2292a2c6b2SChristophe Ricard 2392a2c6b2SChristophe Ricard st33zp24@0 { 2492a2c6b2SChristophe Ricard 2592a2c6b2SChristophe Ricard compatible = "st,st33zp24-spi"; 2692a2c6b2SChristophe Ricard 2792a2c6b2SChristophe Ricard spi-max-frequency = <10000000>; 2892a2c6b2SChristophe Ricard 2992a2c6b2SChristophe Ricard interrupt-parent = <&gpio5>; 3092a2c6b2SChristophe Ricard interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; 3192a2c6b2SChristophe Ricard 3292a2c6b2SChristophe Ricard lpcpd-gpios = <&gpio5 15 GPIO_ACTIVE_HIGH>; 3392a2c6b2SChristophe Ricard }; 3492a2c6b2SChristophe Ricard}; 35