1b14e889cSNobuhiro Iwamatsu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2b14e889cSNobuhiro Iwamatsu%YAML 1.2 3b14e889cSNobuhiro Iwamatsu--- 4b14e889cSNobuhiro Iwamatsu$id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml# 5b14e889cSNobuhiro Iwamatsu$schema: http://devicetree.org/meta-schemas/core.yaml# 6b14e889cSNobuhiro Iwamatsu 7b14e889cSNobuhiro Iwamatsutitle: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock 8b14e889cSNobuhiro Iwamatsu 9b14e889cSNobuhiro Iwamatsudescription: 10b14e889cSNobuhiro Iwamatsu RTC controller for the Xilinx Zynq MPSoC Real Time Clock. 11b14e889cSNobuhiro Iwamatsu The RTC controller has separate IRQ lines for seconds and alarm. 12b14e889cSNobuhiro Iwamatsu 13b14e889cSNobuhiro Iwamatsumaintainers: 14*d5c421d2SMichal Simek - Michal Simek <michal.simek@amd.com> 15b14e889cSNobuhiro Iwamatsu 16b14e889cSNobuhiro IwamatsuallOf: 17b14e889cSNobuhiro Iwamatsu - $ref: rtc.yaml# 18b14e889cSNobuhiro Iwamatsu 19b14e889cSNobuhiro Iwamatsuproperties: 20b14e889cSNobuhiro Iwamatsu compatible: 21b14e889cSNobuhiro Iwamatsu const: xlnx,zynqmp-rtc 22b14e889cSNobuhiro Iwamatsu 23b14e889cSNobuhiro Iwamatsu reg: 24b14e889cSNobuhiro Iwamatsu maxItems: 1 25b14e889cSNobuhiro Iwamatsu 26f69060c1SSrinivas Neeli clocks: 27f69060c1SSrinivas Neeli maxItems: 1 28f69060c1SSrinivas Neeli 29f69060c1SSrinivas Neeli clock-names: 30f69060c1SSrinivas Neeli items: 31f69060c1SSrinivas Neeli - const: rtc 32f69060c1SSrinivas Neeli 33b14e889cSNobuhiro Iwamatsu interrupts: 34f69060c1SSrinivas Neeli maxItems: 2 35b14e889cSNobuhiro Iwamatsu 36b14e889cSNobuhiro Iwamatsu interrupt-names: 37b14e889cSNobuhiro Iwamatsu items: 38b14e889cSNobuhiro Iwamatsu - const: alarm 39b14e889cSNobuhiro Iwamatsu - const: sec 40b14e889cSNobuhiro Iwamatsu 41b14e889cSNobuhiro Iwamatsu calibration: 42b14e889cSNobuhiro Iwamatsu description: | 43b14e889cSNobuhiro Iwamatsu calibration value for 1 sec period which will 44b14e889cSNobuhiro Iwamatsu be programmed directly to calibration register. 45b14e889cSNobuhiro Iwamatsu $ref: /schemas/types.yaml#/definitions/uint32 46b14e889cSNobuhiro Iwamatsu minimum: 0x1 47b14e889cSNobuhiro Iwamatsu maximum: 0x1FFFFF 48b14e889cSNobuhiro Iwamatsu default: 0x198233 49f69060c1SSrinivas Neeli deprecated: true 50b14e889cSNobuhiro Iwamatsu 51b14e889cSNobuhiro Iwamatsurequired: 52b14e889cSNobuhiro Iwamatsu - compatible 53b14e889cSNobuhiro Iwamatsu - reg 54b14e889cSNobuhiro Iwamatsu - interrupts 55b14e889cSNobuhiro Iwamatsu - interrupt-names 56b14e889cSNobuhiro Iwamatsu 57b14e889cSNobuhiro IwamatsuadditionalProperties: false 58b14e889cSNobuhiro Iwamatsu 59b14e889cSNobuhiro Iwamatsuexamples: 60b14e889cSNobuhiro Iwamatsu - | 61b14e889cSNobuhiro Iwamatsu soc { 62b14e889cSNobuhiro Iwamatsu #address-cells = <2>; 63b14e889cSNobuhiro Iwamatsu #size-cells = <2>; 64b14e889cSNobuhiro Iwamatsu 65b14e889cSNobuhiro Iwamatsu rtc: rtc@ffa60000 { 66b14e889cSNobuhiro Iwamatsu compatible = "xlnx,zynqmp-rtc"; 67b14e889cSNobuhiro Iwamatsu reg = <0x0 0xffa60000 0x0 0x100>; 68b14e889cSNobuhiro Iwamatsu interrupt-parent = <&gic>; 69b14e889cSNobuhiro Iwamatsu interrupts = <0 26 4>, <0 27 4>; 70b14e889cSNobuhiro Iwamatsu interrupt-names = "alarm", "sec"; 71b14e889cSNobuhiro Iwamatsu calibration = <0x198233>; 72f69060c1SSrinivas Neeli clock-names = "rtc"; 73f69060c1SSrinivas Neeli clocks = <&rtc_clk>; 74b14e889cSNobuhiro Iwamatsu }; 75b14e889cSNobuhiro Iwamatsu }; 76