1*b14e889cSNobuhiro Iwamatsu# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*b14e889cSNobuhiro Iwamatsu%YAML 1.2 3*b14e889cSNobuhiro Iwamatsu--- 4*b14e889cSNobuhiro Iwamatsu$id: http://devicetree.org/schemas/rtc/xlnx,zynqmp-rtc.yaml# 5*b14e889cSNobuhiro Iwamatsu$schema: http://devicetree.org/meta-schemas/core.yaml# 6*b14e889cSNobuhiro Iwamatsu 7*b14e889cSNobuhiro Iwamatsutitle: Xilinx Zynq Ultrascale+ MPSoC Real Time Clock 8*b14e889cSNobuhiro Iwamatsu 9*b14e889cSNobuhiro Iwamatsudescription: 10*b14e889cSNobuhiro Iwamatsu RTC controller for the Xilinx Zynq MPSoC Real Time Clock. 11*b14e889cSNobuhiro Iwamatsu The RTC controller has separate IRQ lines for seconds and alarm. 12*b14e889cSNobuhiro Iwamatsu 13*b14e889cSNobuhiro Iwamatsumaintainers: 14*b14e889cSNobuhiro Iwamatsu - Michal Simek <michal.simek@xilinx.com> 15*b14e889cSNobuhiro Iwamatsu 16*b14e889cSNobuhiro IwamatsuallOf: 17*b14e889cSNobuhiro Iwamatsu - $ref: rtc.yaml# 18*b14e889cSNobuhiro Iwamatsu 19*b14e889cSNobuhiro Iwamatsuproperties: 20*b14e889cSNobuhiro Iwamatsu compatible: 21*b14e889cSNobuhiro Iwamatsu const: xlnx,zynqmp-rtc 22*b14e889cSNobuhiro Iwamatsu 23*b14e889cSNobuhiro Iwamatsu reg: 24*b14e889cSNobuhiro Iwamatsu maxItems: 1 25*b14e889cSNobuhiro Iwamatsu 26*b14e889cSNobuhiro Iwamatsu interrupts: 27*b14e889cSNobuhiro Iwamatsu minItems: 2 28*b14e889cSNobuhiro Iwamatsu 29*b14e889cSNobuhiro Iwamatsu interrupt-names: 30*b14e889cSNobuhiro Iwamatsu items: 31*b14e889cSNobuhiro Iwamatsu - const: alarm 32*b14e889cSNobuhiro Iwamatsu - const: sec 33*b14e889cSNobuhiro Iwamatsu 34*b14e889cSNobuhiro Iwamatsu calibration: 35*b14e889cSNobuhiro Iwamatsu description: | 36*b14e889cSNobuhiro Iwamatsu calibration value for 1 sec period which will 37*b14e889cSNobuhiro Iwamatsu be programmed directly to calibration register. 38*b14e889cSNobuhiro Iwamatsu $ref: /schemas/types.yaml#/definitions/uint32 39*b14e889cSNobuhiro Iwamatsu minimum: 0x1 40*b14e889cSNobuhiro Iwamatsu maximum: 0x1FFFFF 41*b14e889cSNobuhiro Iwamatsu default: 0x198233 42*b14e889cSNobuhiro Iwamatsu 43*b14e889cSNobuhiro Iwamatsurequired: 44*b14e889cSNobuhiro Iwamatsu - compatible 45*b14e889cSNobuhiro Iwamatsu - reg 46*b14e889cSNobuhiro Iwamatsu - interrupts 47*b14e889cSNobuhiro Iwamatsu - interrupt-names 48*b14e889cSNobuhiro Iwamatsu 49*b14e889cSNobuhiro IwamatsuadditionalProperties: false 50*b14e889cSNobuhiro Iwamatsu 51*b14e889cSNobuhiro Iwamatsuexamples: 52*b14e889cSNobuhiro Iwamatsu - | 53*b14e889cSNobuhiro Iwamatsu soc { 54*b14e889cSNobuhiro Iwamatsu #address-cells = <2>; 55*b14e889cSNobuhiro Iwamatsu #size-cells = <2>; 56*b14e889cSNobuhiro Iwamatsu 57*b14e889cSNobuhiro Iwamatsu rtc: rtc@ffa60000 { 58*b14e889cSNobuhiro Iwamatsu compatible = "xlnx,zynqmp-rtc"; 59*b14e889cSNobuhiro Iwamatsu reg = <0x0 0xffa60000 0x0 0x100>; 60*b14e889cSNobuhiro Iwamatsu interrupt-parent = <&gic>; 61*b14e889cSNobuhiro Iwamatsu interrupts = <0 26 4>, <0 27 4>; 62*b14e889cSNobuhiro Iwamatsu interrupt-names = "alarm", "sec"; 63*b14e889cSNobuhiro Iwamatsu calibration = <0x198233>; 64*b14e889cSNobuhiro Iwamatsu }; 65*b14e889cSNobuhiro Iwamatsu }; 66