1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: STMicroelectronics STM32 Real Time Clock Bindings 8 9maintainers: 10 - Gabriel Fernandez <gabriel.fernandez@st.com> 11 12properties: 13 compatible: 14 enum: 15 - st,stm32-rtc 16 - st,stm32h7-rtc 17 - st,stm32mp1-rtc 18 19 reg: 20 maxItems: 1 21 22 clocks: 23 minItems: 1 24 maxItems: 2 25 26 clock-names: 27 items: 28 - const: pclk 29 - const: rtc_ck 30 31 interrupts: 32 maxItems: 1 33 34 st,syscfg: 35 allOf: 36 - $ref: "/schemas/types.yaml#/definitions/phandle-array" 37 - items: 38 minItems: 3 39 maxItems: 3 40 description: | 41 Phandle/offset/mask triplet. The phandle to pwrcfg used to 42 access control register at offset, and change the dbp (Disable Backup 43 Protection) bit represented by the mask, mandatory to disable/enable backup 44 domain (RTC registers) write protection. 45 46 assigned-clocks: 47 description: | 48 override default rtc_ck parent clock reference to the rtc_ck clock entry 49 maxItems: 1 50 51 assigned-clock-parents: 52 description: | 53 override default rtc_ck parent clock phandle of the new parent clock of rtc_ck 54 maxItems: 1 55 56allOf: 57 - if: 58 properties: 59 compatible: 60 contains: 61 const: st,stm32-rtc 62 63 then: 64 properties: 65 clocks: 66 minItems: 1 67 maxItems: 1 68 69 clock-names: false 70 71 required: 72 - st,syscfg 73 74 - if: 75 properties: 76 compatible: 77 contains: 78 const: st,stm32h7-rtc 79 80 then: 81 properties: 82 clocks: 83 minItems: 2 84 maxItems: 2 85 86 required: 87 - clock-names 88 - st,syscfg 89 90 - if: 91 properties: 92 compatible: 93 contains: 94 const: st,stm32mp1-rtc 95 96 then: 97 properties: 98 clocks: 99 minItems: 2 100 maxItems: 2 101 102 assigned-clocks: false 103 assigned-clock-parents: false 104 105 required: 106 - clock-names 107 108required: 109 - compatible 110 - reg 111 - clocks 112 - interrupts 113 114additionalProperties: false 115 116examples: 117 - | 118 #include <dt-bindings/mfd/stm32f4-rcc.h> 119 #include <dt-bindings/clock/stm32fx-clock.h> 120 rtc@40002800 { 121 compatible = "st,stm32-rtc"; 122 reg = <0x40002800 0x400>; 123 clocks = <&rcc 1 CLK_RTC>; 124 assigned-clocks = <&rcc 1 CLK_RTC>; 125 assigned-clock-parents = <&rcc 1 CLK_LSE>; 126 interrupt-parent = <&exti>; 127 interrupts = <17 1>; 128 st,syscfg = <&pwrcfg 0x00 0x100>; 129 }; 130 131 #include <dt-bindings/interrupt-controller/arm-gic.h> 132 #include <dt-bindings/clock/stm32mp1-clks.h> 133 rtc@5c004000 { 134 compatible = "st,stm32mp1-rtc"; 135 reg = <0x5c004000 0x400>; 136 clocks = <&rcc RTCAPB>, <&rcc RTC>; 137 clock-names = "pclk", "rtc_ck"; 138 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 139 }; 140 141... 142