1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/rtc/qcom-pm8xxx-rtc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm PM8xxx PMIC RTC device
8
9maintainers:
10  - Satya Priya <quic_c_skakit@quicinc.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - qcom,pm8058-rtc
17          - qcom,pm8921-rtc
18          - qcom,pm8941-rtc
19          - qcom,pmk8350-rtc
20      - items:
21          - enum:
22              - qcom,pm8018-rtc
23          - const: qcom,pm8921-rtc
24
25  reg:
26    minItems: 1
27    maxItems: 2
28
29  reg-names:
30    minItems: 1
31    items:
32      - const: rtc
33      - const: alarm
34
35  interrupts:
36    maxItems: 1
37
38  allow-set-time:
39    $ref: /schemas/types.yaml#/definitions/flag
40    description:
41      Indicates that the setting of RTC time is allowed by the host CPU.
42
43  nvmem-cells:
44    items:
45      - description:
46          four-byte nvmem cell holding a little-endian offset from the Unix
47          epoch representing the time when the RTC timer was last reset
48
49  nvmem-cell-names:
50    items:
51      - const: offset
52
53  wakeup-source: true
54
55required:
56  - compatible
57  - reg
58  - interrupts
59
60additionalProperties: false
61
62examples:
63  - |
64    #include <dt-bindings/spmi/spmi.h>
65    spmi_bus: spmi@c440000 {
66      reg = <0x0c440000 0x1100>;
67      #address-cells = <2>;
68      #size-cells = <0>;
69      pmicintc: pmic@0 {
70        reg = <0x0 SPMI_USID>;
71        compatible = "qcom,pm8921";
72        interrupts = <104 8>;
73        #interrupt-cells = <2>;
74        interrupt-controller;
75        #address-cells = <1>;
76        #size-cells = <0>;
77
78        pm8921_rtc: rtc@11d {
79          compatible = "qcom,pm8921-rtc";
80          reg = <0x11d>;
81          interrupts = <0x27 0>;
82          nvmem-cells = <&rtc_offset>;
83          nvmem-cell-names = "offset";
84        };
85      };
86    };
87...
88