1*2f9df754SThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*2f9df754SThierry Reding%YAML 1.2 3*2f9df754SThierry Reding--- 4*2f9df754SThierry Reding$id: http://devicetree.org/schemas/rtc/nvidia,tegra20-rtc.yaml# 5*2f9df754SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml# 6*2f9df754SThierry Reding 7*2f9df754SThierry Redingtitle: NVIDIA Tegra real-time clock 8*2f9df754SThierry Reding 9*2f9df754SThierry Redingmaintainers: 10*2f9df754SThierry Reding - Thierry Reding <thierry.reding@gmail.com> 11*2f9df754SThierry Reding - Jon Hunter <jonathanh@nvidia.com> 12*2f9df754SThierry Reding 13*2f9df754SThierry Redingdescription: | 14*2f9df754SThierry Reding The Tegra RTC maintains seconds and milliseconds counters, and five 15*2f9df754SThierry Reding alarm registers. The alarms and other interrupts may wake the system 16*2f9df754SThierry Reding from low-power state. 17*2f9df754SThierry Reding 18*2f9df754SThierry Redingproperties: 19*2f9df754SThierry Reding compatible: 20*2f9df754SThierry Reding oneOf: 21*2f9df754SThierry Reding - const: nvidia,tegra20-rtc 22*2f9df754SThierry Reding - items: 23*2f9df754SThierry Reding - enum: 24*2f9df754SThierry Reding - nvidia,tegra30-rtc 25*2f9df754SThierry Reding - nvidia,tegra114-rtc 26*2f9df754SThierry Reding - nvidia,tegra124-rtc 27*2f9df754SThierry Reding - nvidia,tegra210-rtc 28*2f9df754SThierry Reding - nvidia,tegra186-rtc 29*2f9df754SThierry Reding - nvidia,tegra194-rtc 30*2f9df754SThierry Reding - const: nvidia,tegra20-rtc 31*2f9df754SThierry Reding 32*2f9df754SThierry Reding reg: 33*2f9df754SThierry Reding maxItems: 1 34*2f9df754SThierry Reding 35*2f9df754SThierry Reding interrupts: 36*2f9df754SThierry Reding maxItems: 1 37*2f9df754SThierry Reding 38*2f9df754SThierry Reding clocks: 39*2f9df754SThierry Reding maxItems: 1 40*2f9df754SThierry Reding 41*2f9df754SThierry Reding clock-names: 42*2f9df754SThierry Reding items: 43*2f9df754SThierry Reding - const: rtc 44*2f9df754SThierry Reding 45*2f9df754SThierry RedingadditionalProperties: false 46*2f9df754SThierry Reding 47*2f9df754SThierry Redingrequired: 48*2f9df754SThierry Reding - compatible 49*2f9df754SThierry Reding - reg 50*2f9df754SThierry Reding - interrupts 51*2f9df754SThierry Reding - clocks 52*2f9df754SThierry Reding 53*2f9df754SThierry Redingexamples: 54*2f9df754SThierry Reding - | 55*2f9df754SThierry Reding timer@7000e000 { 56*2f9df754SThierry Reding compatible = "nvidia,tegra20-rtc"; 57*2f9df754SThierry Reding reg = <0x7000e000 0x100>; 58*2f9df754SThierry Reding interrupts = <0 2 0x04>; 59*2f9df754SThierry Reding clocks = <&tegra_car 4>; 60*2f9df754SThierry Reding }; 61