1298ff012SArnaud EbalardIntersil ISL12057 I2C RTC/Alarm chip 2298ff012SArnaud Ebalard 3298ff012SArnaud EbalardISL12057 is a trivial I2C device (it has simple device tree bindings, 4298ff012SArnaud Ebalardconsisting of a compatible field, an address and possibly an interrupt 5298ff012SArnaud Ebalardline). 6298ff012SArnaud Ebalard 7298ff012SArnaud EbalardNonetheless, it also supports an option boolean property 871a0151cSSudeep Holla("wakeup-source") to handle the specific use-case found 9298ff012SArnaud Ebalardon at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104 10298ff012SArnaud Ebalardand 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip 11298ff012SArnaud Ebalard(associated with the alarm supported by the driver) is not connected 12298ff012SArnaud Ebalardto the SoC but to a PMIC. It allows the device to be powered up when 13298ff012SArnaud EbalardRTC alarm rings. In order to mark the device has a wakeup source and 14298ff012SArnaud Ebalardget access to the 'wakealarm' sysfs entry, this specific property can 15298ff012SArnaud Ebalardbe set when the IRQ#2 pin of the chip is not connected to the SoC but 16298ff012SArnaud Ebalardcan wake up the device. 17298ff012SArnaud Ebalard 18298ff012SArnaud EbalardRequired properties supported by the device: 19298ff012SArnaud Ebalard 20298ff012SArnaud Ebalard - "compatible": must be "isil,isl12057" 21298ff012SArnaud Ebalard - "reg": I2C bus address of the device 22298ff012SArnaud Ebalard 23298ff012SArnaud EbalardOptional properties: 24298ff012SArnaud Ebalard 2571a0151cSSudeep Holla - "wakeup-source": mark the chip as a wakeup source, independently of 2671a0151cSSudeep Holla the availability of an IRQ line connected to the SoC. 27298ff012SArnaud Ebalard 28298ff012SArnaud Ebalard 29298ff012SArnaud EbalardExample isl12057 node without IRQ#2 pin connected (no alarm support): 30298ff012SArnaud Ebalard 31298ff012SArnaud Ebalard isl12057: isl12057@68 { 32298ff012SArnaud Ebalard compatible = "isil,isl12057"; 33298ff012SArnaud Ebalard reg = <0x68>; 34298ff012SArnaud Ebalard }; 35298ff012SArnaud Ebalard 36298ff012SArnaud Ebalard 37298ff012SArnaud EbalardExample isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note 38298ff012SArnaud Ebalardthat the pinctrl-related properties below are given for completeness and 39298ff012SArnaud Ebalardmay not be required or may be different depending on your system or 40298ff012SArnaud EbalardSoC, and the main function of the MPP used as IRQ line, i.e. 41298ff012SArnaud Ebalard"interrupt-parent" and "interrupts" are usually sufficient): 42298ff012SArnaud Ebalard 43298ff012SArnaud Ebalard pinctrl { 44298ff012SArnaud Ebalard ... 45298ff012SArnaud Ebalard 46298ff012SArnaud Ebalard rtc_alarm_pin: rtc_alarm_pin { 47298ff012SArnaud Ebalard marvell,pins = "mpp6"; 48298ff012SArnaud Ebalard marvell,function = "gpio"; 49298ff012SArnaud Ebalard }; 50298ff012SArnaud Ebalard 51298ff012SArnaud Ebalard ... 52298ff012SArnaud Ebalard 53298ff012SArnaud Ebalard }; 54298ff012SArnaud Ebalard 55298ff012SArnaud Ebalard ... 56298ff012SArnaud Ebalard 57298ff012SArnaud Ebalard isl12057: isl12057@68 { 58298ff012SArnaud Ebalard compatible = "isil,isl12057"; 59298ff012SArnaud Ebalard reg = <0x68>; 60298ff012SArnaud Ebalard pinctrl-0 = <&rtc_alarm_pin>; 61298ff012SArnaud Ebalard pinctrl-names = "default"; 62298ff012SArnaud Ebalard interrupt-parent = <&gpio0>; 63298ff012SArnaud Ebalard interrupts = <6 IRQ_TYPE_EDGE_FALLING>; 64298ff012SArnaud Ebalard }; 65298ff012SArnaud Ebalard 66298ff012SArnaud Ebalard 67298ff012SArnaud EbalardExample isl12057 node without IRQ#2 pin connected to the SoC but to a 68298ff012SArnaud EbalardPMIC, allowing the device to be started based on configured alarm: 69298ff012SArnaud Ebalard 70298ff012SArnaud Ebalard isl12057: isl12057@68 { 71298ff012SArnaud Ebalard compatible = "isil,isl12057"; 72298ff012SArnaud Ebalard reg = <0x68>; 7371a0151cSSudeep Holla wakeup-source; 74298ff012SArnaud Ebalard }; 75