1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/reset/socionext,uniphier-glue-reset.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Socionext UniPhier peripheral core reset in glue layer
8
9description: |
10  Some peripheral core reset belongs to its own glue layer. Before using
11  this core reset, it is necessary to control the clocks and resets to
12  enable this layer. These clocks and resets should be described in each
13  property.
14
15maintainers:
16  - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
17
18properties:
19  compatible:
20    enum:
21      - socionext,uniphier-pro4-usb3-reset
22      - socionext,uniphier-pro5-usb3-reset
23      - socionext,uniphier-pxs2-usb3-reset
24      - socionext,uniphier-ld20-usb3-reset
25      - socionext,uniphier-pxs3-usb3-reset
26      - socionext,uniphier-nx1-usb3-reset
27      - socionext,uniphier-pro4-ahci-reset
28      - socionext,uniphier-pxs2-ahci-reset
29      - socionext,uniphier-pxs3-ahci-reset
30
31  reg:
32    maxItems: 1
33
34  "#reset-cells":
35    const: 1
36
37  clocks:
38    minItems: 1
39    maxItems: 2
40
41  clock-names:
42    oneOf:
43      - items:           # for Pro4, Pro5
44          - const: gio
45          - const: link
46      - items:           # for others
47          - const: link
48
49  resets:
50    minItems: 1
51    maxItems: 2
52
53  reset-names:
54    oneOf:
55      - items:           # for Pro4, Pro5
56          - const: gio
57          - const: link
58      - items:           # for others
59          - const: link
60
61additionalProperties: false
62
63required:
64  - compatible
65  - reg
66  - "#reset-cells"
67  - clocks
68  - clock-names
69  - resets
70  - reset-names
71
72examples:
73  - |
74    usb-glue@65b00000 {
75        compatible = "simple-mfd";
76        #address-cells = <1>;
77        #size-cells = <1>;
78        ranges = <0 0x65b00000 0x400>;
79
80        usb_rst: reset@0 {
81            compatible = "socionext,uniphier-ld20-usb3-reset";
82            reg = <0x0 0x4>;
83            #reset-cells = <1>;
84            clock-names = "link";
85            clocks = <&sys_clk 14>;
86            reset-names = "link";
87            resets = <&sys_rst 14>;
88        };
89    };
90