127dc2fb1SJoachim EastwoodNXP LPC1850 Reset Generation Unit (RGU) 227dc2fb1SJoachim Eastwood======================================== 327dc2fb1SJoachim Eastwood 427dc2fb1SJoachim EastwoodPlease also refer to reset.txt in this directory for common reset 527dc2fb1SJoachim Eastwoodcontroller binding usage. 627dc2fb1SJoachim Eastwood 727dc2fb1SJoachim EastwoodRequired properties: 827dc2fb1SJoachim Eastwood- compatible: Should be "nxp,lpc1850-rgu" 927dc2fb1SJoachim Eastwood- reg: register base and length 1027dc2fb1SJoachim Eastwood- clocks: phandle and clock specifier to RGU clocks 1127dc2fb1SJoachim Eastwood- clock-names: should contain "delay" and "reg" 1227dc2fb1SJoachim Eastwood- #reset-cells: should be 1 1327dc2fb1SJoachim Eastwood 1427dc2fb1SJoachim EastwoodSee table below for valid peripheral reset numbers. Numbers not 1527dc2fb1SJoachim Eastwoodin the table below are either reserved or not applicable for 1627dc2fb1SJoachim Eastwoodnormal operation. 1727dc2fb1SJoachim Eastwood 1827dc2fb1SJoachim EastwoodReset Peripheral 1927dc2fb1SJoachim Eastwood 9 System control unit (SCU) 2027dc2fb1SJoachim Eastwood 12 ARM Cortex-M0 subsystem core (LPC43xx only) 2127dc2fb1SJoachim Eastwood 13 CPU core 2227dc2fb1SJoachim Eastwood 16 LCD controller 2327dc2fb1SJoachim Eastwood 17 USB0 2427dc2fb1SJoachim Eastwood 18 USB1 2527dc2fb1SJoachim Eastwood 19 DMA 2627dc2fb1SJoachim Eastwood 20 SDIO 2727dc2fb1SJoachim Eastwood 21 External memory controller (EMC) 2827dc2fb1SJoachim Eastwood 22 Ethernet 2927dc2fb1SJoachim Eastwood 25 Flash bank A 3027dc2fb1SJoachim Eastwood 27 EEPROM 3127dc2fb1SJoachim Eastwood 28 GPIO 3227dc2fb1SJoachim Eastwood 29 Flash bank B 3327dc2fb1SJoachim Eastwood 32 Timer0 3427dc2fb1SJoachim Eastwood 33 Timer1 3527dc2fb1SJoachim Eastwood 34 Timer2 3627dc2fb1SJoachim Eastwood 35 Timer3 3727dc2fb1SJoachim Eastwood 36 Repetitive Interrupt timer (RIT) 3827dc2fb1SJoachim Eastwood 37 State Configurable Timer (SCT) 3927dc2fb1SJoachim Eastwood 38 Motor control PWM (MCPWM) 4027dc2fb1SJoachim Eastwood 39 QEI 4127dc2fb1SJoachim Eastwood 40 ADC0 4227dc2fb1SJoachim Eastwood 41 ADC1 4327dc2fb1SJoachim Eastwood 42 DAC 4427dc2fb1SJoachim Eastwood 44 USART0 4527dc2fb1SJoachim Eastwood 45 UART1 4627dc2fb1SJoachim Eastwood 46 USART2 4727dc2fb1SJoachim Eastwood 47 USART3 4827dc2fb1SJoachim Eastwood 48 I2C0 4927dc2fb1SJoachim Eastwood 49 I2C1 5027dc2fb1SJoachim Eastwood 50 SSP0 5127dc2fb1SJoachim Eastwood 51 SSP1 5227dc2fb1SJoachim Eastwood 52 I2S0 and I2S1 5327dc2fb1SJoachim Eastwood 53 Serial Flash Interface (SPIFI) 5427dc2fb1SJoachim Eastwood 54 C_CAN1 5527dc2fb1SJoachim Eastwood 55 C_CAN0 5627dc2fb1SJoachim Eastwood 56 ARM Cortex-M0 application core (LPC4370 only) 5727dc2fb1SJoachim Eastwood 57 SGPIO (LPC43xx only) 5827dc2fb1SJoachim Eastwood 58 SPI (LPC43xx only) 5927dc2fb1SJoachim Eastwood 60 ADCHS (12-bit ADC) (LPC4370 only) 6027dc2fb1SJoachim Eastwood 6127dc2fb1SJoachim EastwoodRefer to NXP LPC18xx or LPC43xx user manual for more details about 6227dc2fb1SJoachim Eastwoodthe reset signals and the connected block/peripheral. 6327dc2fb1SJoachim Eastwood 6427dc2fb1SJoachim EastwoodReset provider example: 6527dc2fb1SJoachim Eastwoodrgu: reset-controller@40053000 { 6627dc2fb1SJoachim Eastwood compatible = "nxp,lpc1850-rgu"; 6727dc2fb1SJoachim Eastwood reg = <0x40053000 0x1000>; 6827dc2fb1SJoachim Eastwood clocks = <&cgu BASE_SAFE_CLK>, <&ccu1 CLK_CPU_BUS>; 6927dc2fb1SJoachim Eastwood clock-names = "delay", "reg"; 7027dc2fb1SJoachim Eastwood #reset-cells = <1>; 7127dc2fb1SJoachim Eastwood}; 7227dc2fb1SJoachim Eastwood 7327dc2fb1SJoachim EastwoodReset consumer example: 7427dc2fb1SJoachim Eastwoodmac: ethernet@40010000 { 7527dc2fb1SJoachim Eastwood compatible = "nxp,lpc1850-dwmac", "snps,dwmac-3.611", "snps,dwmac"; 7627dc2fb1SJoachim Eastwood reg = <0x40010000 0x2000>; 7727dc2fb1SJoachim Eastwood interrupts = <5>; 7827dc2fb1SJoachim Eastwood interrupt-names = "macirq"; 7927dc2fb1SJoachim Eastwood clocks = <&ccu1 CLK_CPU_ETHERNET>; 8027dc2fb1SJoachim Eastwood clock-names = "stmmaceth"; 8127dc2fb1SJoachim Eastwood resets = <&rgu 22>; 8227dc2fb1SJoachim Eastwood reset-names = "stmmaceth"; 8327dc2fb1SJoachim Eastwood status = "disabled"; 8427dc2fb1SJoachim Eastwood}; 85