1*7809a619SPhilipp Zabel# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*7809a619SPhilipp Zabel%YAML 1.2 3*7809a619SPhilipp Zabel--- 4*7809a619SPhilipp Zabel$id: http://devicetree.org/schemas/reset/lantiq,reset.yaml# 5*7809a619SPhilipp Zabel$schema: http://devicetree.org/meta-schemas/core.yaml# 6*7809a619SPhilipp Zabel 7*7809a619SPhilipp Zabeltitle: Lantiq XWAY SoC RCU reset controller 8*7809a619SPhilipp Zabel 9*7809a619SPhilipp Zabelmaintainers: 10*7809a619SPhilipp Zabel - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 11*7809a619SPhilipp Zabel 12*7809a619SPhilipp Zabeldescription: | 13*7809a619SPhilipp Zabel This binding describes a reset-controller found on the RCU module on Lantiq 14*7809a619SPhilipp Zabel XWAY SoCs. This node has to be a sub node of the Lantiq RCU block. 15*7809a619SPhilipp Zabel 16*7809a619SPhilipp Zabelproperties: 17*7809a619SPhilipp Zabel compatible: 18*7809a619SPhilipp Zabel enum: 19*7809a619SPhilipp Zabel - lantiq,danube-reset 20*7809a619SPhilipp Zabel - lantiq,xrx200-reset 21*7809a619SPhilipp Zabel 22*7809a619SPhilipp Zabel reg: 23*7809a619SPhilipp Zabel description: | 24*7809a619SPhilipp Zabel Defines the following sets of registers in the parent syscon device 25*7809a619SPhilipp Zabel Offset of the reset set register 26*7809a619SPhilipp Zabel Offset of the reset status register 27*7809a619SPhilipp Zabel maxItems: 2 28*7809a619SPhilipp Zabel 29*7809a619SPhilipp Zabel '#reset-cells': 30*7809a619SPhilipp Zabel description: | 31*7809a619SPhilipp Zabel The first cell takes the reset set bit and the second cell takes the 32*7809a619SPhilipp Zabel status bit. 33*7809a619SPhilipp Zabel const: 2 34*7809a619SPhilipp Zabel 35*7809a619SPhilipp Zabelrequired: 36*7809a619SPhilipp Zabel - compatible 37*7809a619SPhilipp Zabel - reg 38*7809a619SPhilipp Zabel - '#reset-cells' 39*7809a619SPhilipp Zabel 40*7809a619SPhilipp ZabeladditionalProperties: false 41*7809a619SPhilipp Zabel 42*7809a619SPhilipp Zabelexamples: 43*7809a619SPhilipp Zabel - | 44*7809a619SPhilipp Zabel // On the xRX200 SoCs: 45*7809a619SPhilipp Zabel reset0: reset-controller@10 { 46*7809a619SPhilipp Zabel compatible = "lantiq,xrx200-reset"; 47*7809a619SPhilipp Zabel reg = <0x10 0x04>, <0x14 0x04>; 48*7809a619SPhilipp Zabel #reset-cells = <2>; 49*7809a619SPhilipp Zabel }; 50