1# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: OMAP4+ Remoteproc Devices
8
9maintainers:
10  - Suman Anna <s-anna@ti.com>
11
12description:
13  The OMAP family of SoCs usually have one or more slave processor sub-systems
14  that are used to offload some of the processor-intensive tasks, or to manage
15  other hardware accelerators, for achieving various system level goals.
16
17  The processor cores in the sub-system are usually behind an IOMMU, and may
18  contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
19  caches, an Interrupt Controller, a Cache Controller etc.
20
21  The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
22  sub-system. The DSP processor sub-system can contain any of the TI's C64x,
23  C66x or C67x family of DSP cores as the main execution unit. The IPU processor
24  sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core
25  Cortex-M4 processors.
26
27  Each remote processor sub-system is represented as a single DT node. Each node
28  has a number of required or optional properties that enable the OS running on
29  the host processor (MPU) to perform the device management of the remote
30  processor and to communicate with the remote processor. The various properties
31  can be classified as constant or variable. The constant properties are
32  dictated by the SoC and does not change from one board to another having the
33  same SoC. Examples of constant properties include 'iommus', 'reg'. The
34  variable properties are dictated by the system integration aspects such as
35  memory on the board, or configuration used within the corresponding firmware
36  image. Examples of variable properties include 'mboxes', 'memory-region',
37  'timers', 'watchdog-timers' etc.
38
39properties:
40  compatible:
41    enum:
42      - ti,omap4-dsp
43      - ti,omap5-dsp
44      - ti,dra7-dsp
45      - ti,omap4-ipu
46      - ti,omap5-ipu
47      - ti,dra7-ipu
48
49  iommus:
50    minItems: 1
51    maxItems: 2
52    description: |
53      phandles to OMAP IOMMU nodes, that need to be programmed
54      for this remote processor to access any external RAM memory or
55      other peripheral device address spaces. This property usually
56      has only a single phandle. Multiple phandles are used only in
57      cases where the sub-system has different ports for different
58      sub-modules within the processor sub-system (eg: DRA7 DSPs),
59      and need the same programming in both the MMUs.
60
61  mboxes:
62    minItems: 1
63    maxItems: 2
64    description: |
65      OMAP Mailbox specifier denoting the sub-mailbox, to be used for
66      communication with the remote processor. The specifier format is
67      as per the bindings,
68      Documentation/devicetree/bindings/mailbox/omap-mailbox.txt
69      This property should match with the sub-mailbox node used in
70      the firmware image.
71
72  clocks:
73    description: |
74      Main functional clock for the remote processor
75
76  resets:
77    description: |
78      Reset handles for the remote processor
79
80  firmware-name:
81    description: |
82      Default name of the firmware to load to the remote processor.
83
84# Optional properties:
85# --------------------
86# Some of these properties are mandatory on some SoCs, and some are optional
87# depending on the configuration of the firmware image to be executed on the
88# remote processor. The conditions are mentioned for each property.
89#
90# The following are the optional properties:
91
92  memory-region:
93    $ref: /schemas/types.yaml#/definitions/phandle
94    description: |
95      phandle to the reserved memory node to be associated
96      with the remoteproc device. The reserved memory node
97      can be a CMA memory node, and should be defined as
98      per the bindings,
99      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
100
101  reg:
102    description: |
103      Address space for any remoteproc memories present on
104      the SoC. Should contain an entry for each value in
105      'reg-names'. These are mandatory for all DSP and IPU
106      processors that have them (OMAP4/OMAP5 DSPs do not have
107      any RAMs)
108
109  reg-names:
110    description: |
111      Required names for each of the address spaces defined in
112      the 'reg' property. Expects the names from the following
113      list, in the specified order, each representing the corresponding
114      internal RAM memory region.
115    minItems: 1
116    maxItems: 3
117    items:
118      - const: l2ram
119      - const: l1pram
120      - const: l1dram
121
122  ti,bootreg:
123    $ref: /schemas/types.yaml#/definitions/phandle-array
124    description: |
125      Should be a triple of the phandle to the System Control
126      Configuration region that contains the boot address
127      register, the register offset of the boot address
128      register within the System Control module, and the bit
129      shift within the register. This property is required for
130      all the DSP instances on OMAP4, OMAP5 and DRA7xx SoCs.
131
132  ti,autosuspend-delay-ms:
133    description: |
134      Custom autosuspend delay for the remoteproc in milliseconds.
135      Recommended values is preferable to be in the order of couple
136      of seconds. A negative value can also be used to disable the
137      autosuspend behavior.
138
139  ti,timers:
140    $ref: /schemas/types.yaml#/definitions/phandle-array
141    description: |
142      One or more phandles to OMAP DMTimer nodes, that serve
143      as System/Tick timers for the OS running on the remote
144      processors. This will usually be a single timer if the
145      processor sub-system is running in SMP mode, or one per
146      core in the processor sub-system. This can also be used
147      to reserve specific timers to be dedicated to the
148      remote processors.
149
150      This property is mandatory on remote processors requiring
151      external tick wakeup, and to support Power Management
152      features. The timers to be used should match with the
153      timers used in the firmware image.
154
155  ti,watchdog-timers:
156    $ref: /schemas/types.yaml#/definitions/phandle-array
157    description: |
158      One or more phandles to OMAP DMTimer nodes, used to
159      serve as Watchdog timers for the processor cores. This
160      will usually be one per executing processor core, even
161      if the processor sub-system is running a SMP OS.
162
163      The timers to be used should match with the watchdog
164      timers used in the firmware image.
165
166if:
167  properties:
168    compatible:
169      enum:
170        - ti,dra7-dsp
171then:
172  properties:
173    reg:
174      minItems: 3
175      maxItems: 3
176  required:
177    - reg
178    - reg-names
179    - ti,bootreg
180
181else:
182  if:
183    properties:
184      compatible:
185        enum:
186          - ti,omap4-ipu
187          - ti,omap5-ipu
188          - ti,dra7-ipu
189  then:
190    properties:
191      reg:
192        minItems: 1
193        maxItems: 1
194      ti,bootreg: false
195    required:
196      - reg
197      - reg-names
198
199  else:
200    properties:
201      reg: false
202    required:
203      - ti,bootreg
204
205required:
206  - compatible
207  - iommus
208  - mboxes
209  - clocks
210  - resets
211  - firmware-name
212
213additionalProperties: false
214
215examples:
216  - |
217
218    //Example 1: OMAP4 DSP
219
220    /* DSP Reserved Memory node */
221    #include <dt-bindings/clock/omap4.h>
222    reserved-memory {
223        #address-cells = <1>;
224        #size-cells = <1>;
225
226        dsp_memory_region: dsp-memory@98000000 {
227            compatible = "shared-dma-pool";
228            reg = <0x98000000 0x800000>;
229            reusable;
230        };
231    };
232
233    /* DSP node */
234    ocp {
235        dsp: dsp {
236            compatible = "ti,omap4-dsp";
237            ti,bootreg = <&scm_conf 0x304 0>;
238            iommus = <&mmu_dsp>;
239            mboxes = <&mailbox &mbox_dsp>;
240            memory-region = <&dsp_memory_region>;
241            ti,timers = <&timer5>;
242            ti,watchdog-timers = <&timer6>;
243            clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
244            resets = <&prm_tesla 0>, <&prm_tesla 1>;
245            firmware-name = "omap4-dsp-fw.xe64T";
246        };
247    };
248
249  - |+
250
251    //Example 2: OMAP5 IPU
252
253    /* IPU Reserved Memory node */
254    #include <dt-bindings/clock/omap5.h>
255    reserved-memory {
256        #address-cells = <2>;
257        #size-cells = <2>;
258
259        ipu_memory_region: ipu-memory@95800000 {
260            compatible = "shared-dma-pool";
261            reg = <0 0x95800000 0 0x3800000>;
262            reusable;
263        };
264    };
265
266    /* IPU node */
267    ocp {
268        #address-cells = <1>;
269        #size-cells = <1>;
270
271        ipu: ipu@55020000 {
272            compatible = "ti,omap5-ipu";
273            reg = <0x55020000 0x10000>;
274            reg-names = "l2ram";
275            iommus = <&mmu_ipu>;
276            mboxes = <&mailbox &mbox_ipu>;
277            memory-region = <&ipu_memory_region>;
278            ti,timers = <&timer3>, <&timer4>;
279            ti,watchdog-timers = <&timer9>, <&timer11>;
280            clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
281            resets = <&prm_core 2>;
282            firmware-name = "omap5-ipu-fw.xem4";
283        };
284    };
285
286  - |+
287
288    //Example 3: DRA7xx/AM57xx DSP
289
290    /* DSP1 Reserved Memory node */
291    #include <dt-bindings/clock/dra7.h>
292    reserved-memory {
293        #address-cells = <2>;
294        #size-cells = <2>;
295
296        dsp1_memory_region: dsp1-memory@99000000 {
297            compatible = "shared-dma-pool";
298            reg = <0x0 0x99000000 0x0 0x4000000>;
299            reusable;
300        };
301    };
302
303    /* DSP1 node */
304    ocp {
305        #address-cells = <1>;
306        #size-cells = <1>;
307
308        dsp1: dsp@40800000 {
309            compatible = "ti,dra7-dsp";
310            reg = <0x40800000 0x48000>,
311                  <0x40e00000 0x8000>,
312                  <0x40f00000 0x8000>;
313            reg-names = "l2ram", "l1pram", "l1dram";
314            ti,bootreg = <&scm_conf 0x55c 0>;
315            iommus = <&mmu0_dsp1>, <&mmu1_dsp1>;
316            mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
317            memory-region = <&dsp1_memory_region>;
318            ti,timers = <&timer5>;
319            ti,watchdog-timers = <&timer10>;
320            resets = <&prm_dsp1 0>;
321            clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;
322            firmware-name = "dra7-dsp1-fw.xe66";
323        };
324    };
325