1# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/ti,omap-remoteproc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: OMAP4+ Remoteproc Devices
8
9maintainers:
10  - Suman Anna <s-anna@ti.com>
11
12description:
13  The OMAP family of SoCs usually have one or more slave processor sub-systems
14  that are used to offload some of the processor-intensive tasks, or to manage
15  other hardware accelerators, for achieving various system level goals.
16
17  The processor cores in the sub-system are usually behind an IOMMU, and may
18  contain additional sub-modules like Internal RAM and/or ROMs, L1 and/or L2
19  caches, an Interrupt Controller, a Cache Controller etc.
20
21  The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
22  sub-system. The DSP processor sub-system can contain any of the TI's C64x,
23  C66x or C67x family of DSP cores as the main execution unit. The IPU processor
24  sub-system usually contains either a Dual-Core Cortex-M3 or Dual-Core
25  Cortex-M4 processors.
26
27  Each remote processor sub-system is represented as a single DT node. Each node
28  has a number of required or optional properties that enable the OS running on
29  the host processor (MPU) to perform the device management of the remote
30  processor and to communicate with the remote processor. The various properties
31  can be classified as constant or variable. The constant properties are
32  dictated by the SoC and does not change from one board to another having the
33  same SoC. Examples of constant properties include 'iommus', 'reg'. The
34  variable properties are dictated by the system integration aspects such as
35  memory on the board, or configuration used within the corresponding firmware
36  image. Examples of variable properties include 'mboxes', 'memory-region',
37  'timers', 'watchdog-timers' etc.
38
39properties:
40  compatible:
41    enum:
42      - ti,omap4-dsp
43      - ti,omap5-dsp
44      - ti,dra7-dsp
45      - ti,omap4-ipu
46      - ti,omap5-ipu
47      - ti,dra7-ipu
48
49  iommus:
50    minItems: 1
51    maxItems: 2
52    description: |
53      phandles to OMAP IOMMU nodes, that need to be programmed
54      for this remote processor to access any external RAM memory or
55      other peripheral device address spaces. This property usually
56      has only a single phandle. Multiple phandles are used only in
57      cases where the sub-system has different ports for different
58      sub-modules within the processor sub-system (eg: DRA7 DSPs),
59      and need the same programming in both the MMUs.
60
61  mboxes:
62    minItems: 1
63    maxItems: 2
64    description: |
65      OMAP Mailbox specifier denoting the sub-mailbox, to be used for
66      communication with the remote processor. The specifier format is
67      as per the bindings,
68      Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml
69      This property should match with the sub-mailbox node used in
70      the firmware image.
71
72  clocks:
73    maxItems: 1
74    description: |
75      Main functional clock for the remote processor
76
77  resets:
78    minItems: 1
79    maxItems: 2
80    description: |
81      Reset handles for the remote processor
82
83  firmware-name:
84    description: |
85      Default name of the firmware to load to the remote processor.
86
87# Optional properties:
88# --------------------
89# Some of these properties are mandatory on some SoCs, and some are optional
90# depending on the configuration of the firmware image to be executed on the
91# remote processor. The conditions are mentioned for each property.
92#
93# The following are the optional properties:
94
95  memory-region:
96    maxItems: 1
97    description: |
98      phandle to the reserved memory node to be associated
99      with the remoteproc device. The reserved memory node
100      can be a CMA memory node, and should be defined as
101      per the bindings,
102      Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
103
104  reg:
105    description: |
106      Address space for any remoteproc memories present on
107      the SoC. Should contain an entry for each value in
108      'reg-names'. These are mandatory for all DSP and IPU
109      processors that have them (OMAP4/OMAP5 DSPs do not have
110      any RAMs)
111
112  reg-names:
113    description: |
114      Required names for each of the address spaces defined in
115      the 'reg' property. Expects the names from the following
116      list, in the specified order, each representing the corresponding
117      internal RAM memory region.
118    minItems: 1
119    items:
120      - const: l2ram
121      - const: l1pram
122      - const: l1dram
123
124  ti,bootreg:
125    $ref: /schemas/types.yaml#/definitions/phandle-array
126    description: |
127      Should be a triple of the phandle to the System Control
128      Configuration region that contains the boot address
129      register, the register offset of the boot address
130      register within the System Control module, and the bit
131      shift within the register. This property is required for
132      all the DSP instances on OMAP4, OMAP5 and DRA7xx SoCs.
133
134  ti,autosuspend-delay-ms:
135    description: |
136      Custom autosuspend delay for the remoteproc in milliseconds.
137      Recommended values is preferable to be in the order of couple
138      of seconds. A negative value can also be used to disable the
139      autosuspend behavior.
140
141  ti,timers:
142    $ref: /schemas/types.yaml#/definitions/phandle-array
143    description: |
144      One or more phandles to OMAP DMTimer nodes, that serve
145      as System/Tick timers for the OS running on the remote
146      processors. This will usually be a single timer if the
147      processor sub-system is running in SMP mode, or one per
148      core in the processor sub-system. This can also be used
149      to reserve specific timers to be dedicated to the
150      remote processors.
151
152      This property is mandatory on remote processors requiring
153      external tick wakeup, and to support Power Management
154      features. The timers to be used should match with the
155      timers used in the firmware image.
156
157  ti,watchdog-timers:
158    $ref: /schemas/types.yaml#/definitions/phandle-array
159    description: |
160      One or more phandles to OMAP DMTimer nodes, used to
161      serve as Watchdog timers for the processor cores. This
162      will usually be one per executing processor core, even
163      if the processor sub-system is running a SMP OS.
164
165      The timers to be used should match with the watchdog
166      timers used in the firmware image.
167
168if:
169  properties:
170    compatible:
171      enum:
172        - ti,dra7-dsp
173then:
174  properties:
175    reg:
176      minItems: 3
177      maxItems: 3
178  required:
179    - reg
180    - reg-names
181    - ti,bootreg
182
183else:
184  if:
185    properties:
186      compatible:
187        enum:
188          - ti,omap4-ipu
189          - ti,omap5-ipu
190          - ti,dra7-ipu
191  then:
192    properties:
193      reg:
194        minItems: 1
195        maxItems: 1
196      ti,bootreg: false
197    required:
198      - reg
199      - reg-names
200
201  else:
202    properties:
203      reg: false
204    required:
205      - ti,bootreg
206
207required:
208  - compatible
209  - iommus
210  - mboxes
211  - clocks
212  - resets
213  - firmware-name
214
215additionalProperties: false
216
217examples:
218  - |
219
220    //Example 1: OMAP4 DSP
221
222    /* DSP Reserved Memory node */
223    #include <dt-bindings/clock/omap4.h>
224    reserved-memory {
225        #address-cells = <1>;
226        #size-cells = <1>;
227
228        dsp_memory_region: dsp-memory@98000000 {
229            compatible = "shared-dma-pool";
230            reg = <0x98000000 0x800000>;
231            reusable;
232        };
233    };
234
235    /* DSP node */
236    ocp {
237        dsp: dsp {
238            compatible = "ti,omap4-dsp";
239            ti,bootreg = <&scm_conf 0x304 0>;
240            iommus = <&mmu_dsp>;
241            mboxes = <&mailbox &mbox_dsp>;
242            memory-region = <&dsp_memory_region>;
243            ti,timers = <&timer5>;
244            ti,watchdog-timers = <&timer6>;
245            clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
246            resets = <&prm_tesla 0>, <&prm_tesla 1>;
247            firmware-name = "omap4-dsp-fw.xe64T";
248        };
249    };
250
251  - |+
252
253    //Example 2: OMAP5 IPU
254
255    /* IPU Reserved Memory node */
256    #include <dt-bindings/clock/omap5.h>
257    reserved-memory {
258        #address-cells = <2>;
259        #size-cells = <2>;
260
261        ipu_memory_region: ipu-memory@95800000 {
262            compatible = "shared-dma-pool";
263            reg = <0 0x95800000 0 0x3800000>;
264            reusable;
265        };
266    };
267
268    /* IPU node */
269    ocp {
270        #address-cells = <1>;
271        #size-cells = <1>;
272
273        ipu: ipu@55020000 {
274            compatible = "ti,omap5-ipu";
275            reg = <0x55020000 0x10000>;
276            reg-names = "l2ram";
277            iommus = <&mmu_ipu>;
278            mboxes = <&mailbox &mbox_ipu>;
279            memory-region = <&ipu_memory_region>;
280            ti,timers = <&timer3>, <&timer4>;
281            ti,watchdog-timers = <&timer9>, <&timer11>;
282            clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
283            resets = <&prm_core 2>;
284            firmware-name = "omap5-ipu-fw.xem4";
285        };
286    };
287
288  - |+
289
290    //Example 3: DRA7xx/AM57xx DSP
291
292    /* DSP1 Reserved Memory node */
293    #include <dt-bindings/clock/dra7.h>
294    reserved-memory {
295        #address-cells = <2>;
296        #size-cells = <2>;
297
298        dsp1_memory_region: dsp1-memory@99000000 {
299            compatible = "shared-dma-pool";
300            reg = <0x0 0x99000000 0x0 0x4000000>;
301            reusable;
302        };
303    };
304
305    /* DSP1 node */
306    ocp {
307        #address-cells = <1>;
308        #size-cells = <1>;
309
310        dsp1: dsp@40800000 {
311            compatible = "ti,dra7-dsp";
312            reg = <0x40800000 0x48000>,
313                  <0x40e00000 0x8000>,
314                  <0x40f00000 0x8000>;
315            reg-names = "l2ram", "l1pram", "l1dram";
316            ti,bootreg = <&scm_conf 0x55c 0>;
317            iommus = <&mmu0_dsp1>, <&mmu1_dsp1>;
318            mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
319            memory-region = <&dsp1_memory_region>;
320            ti,timers = <&timer5>;
321            ti,watchdog-timers = <&timer10>;
322            resets = <&prm_dsp1 0>;
323            clocks = <&dsp1_clkctrl DRA7_DSP1_MMU0_DSP1_CLKCTRL 0>;
324            firmware-name = "dra7-dsp1-fw.xe66";
325        };
326    };
327