1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/remoteproc/qcom,sm8350-pas.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm SM8350/SM8450 Peripheral Authentication Service
8
9maintainers:
10  - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
11
12description:
13  Qualcomm SM8350/SM8450 SoC Peripheral Authentication Service loads and boots
14  firmware on the Qualcomm DSP Hexagon cores.
15
16properties:
17  compatible:
18    enum:
19      - qcom,sm8350-adsp-pas
20      - qcom,sm8350-cdsp-pas
21      - qcom,sm8350-slpi-pas
22      - qcom,sm8350-mpss-pas
23      - qcom,sm8450-adsp-pas
24      - qcom,sm8450-cdsp-pas
25      - qcom,sm8450-mpss-pas
26      - qcom,sm8450-slpi-pas
27
28  reg:
29    maxItems: 1
30
31  clocks:
32    items:
33      - description: XO clock
34
35  clock-names:
36    items:
37      - const: xo
38
39  qcom,qmp:
40    $ref: /schemas/types.yaml#/definitions/phandle
41    description: Reference to the AOSS side-channel message RAM.
42
43  smd-edge: false
44
45  memory-region:
46    maxItems: 1
47    description: Reference to the reserved-memory for the Hexagon core
48
49  firmware-name:
50    $ref: /schemas/types.yaml#/definitions/string
51    description: Firmware name for the Hexagon core
52
53required:
54  - compatible
55  - reg
56  - memory-region
57
58allOf:
59  - $ref: /schemas/remoteproc/qcom,pas-common.yaml#
60  - if:
61      properties:
62        compatible:
63          enum:
64            - qcom,sm8350-adsp-pas
65            - qcom,sm8350-cdsp-pas
66            - qcom,sm8350-slpi-pas
67            - qcom,sm8450-adsp-pas
68            - qcom,sm8450-cdsp-pas
69            - qcom,sm8450-slpi-pas
70    then:
71      properties:
72        interrupts:
73          maxItems: 5
74        interrupt-names:
75          maxItems: 5
76    else:
77      properties:
78        interrupts:
79          minItems: 6
80        interrupt-names:
81          minItems: 6
82
83  - if:
84      properties:
85        compatible:
86          enum:
87            - qcom,sm8350-mpss-pas
88            - qcom,sm8450-mpss-pas
89    then:
90      properties:
91        power-domains:
92          items:
93            - description: CX power domain
94            - description: MSS power domain
95        power-domain-names:
96          items:
97            - const: cx
98            - const: mss
99
100  - if:
101      properties:
102        compatible:
103          enum:
104            - qcom,sm8350-adsp-pas
105            - qcom,sm8350-slpi-pas
106            - qcom,sm8450-adsp-pas
107            - qcom,sm8450-slpi-pas
108    then:
109      properties:
110        power-domains:
111          items:
112            - description: LCX power domain
113            - description: LMX power domain
114        power-domain-names:
115          items:
116            - const: lcx
117            - const: lmx
118
119  - if:
120      properties:
121        compatible:
122          enum:
123            - qcom,sm8350-cdsp-pas
124            - qcom,sm8450-cdsp-pas
125    then:
126      properties:
127        power-domains:
128          items:
129            - description: CX power domain
130            - description: MXC power domain
131        power-domain-names:
132          items:
133            - const: cx
134            - const: mxc
135
136unevaluatedProperties: false
137
138examples:
139  - |
140    #include <dt-bindings/clock/qcom,rpmh.h>
141    #include <dt-bindings/interrupt-controller/irq.h>
142    #include <dt-bindings/mailbox/qcom-ipcc.h>
143    #include <dt-bindings/power/qcom,rpmhpd.h>
144
145    remoteproc@30000000 {
146        compatible = "qcom,sm8450-adsp-pas";
147        reg = <0x030000000 0x100>;
148
149        clocks = <&rpmhcc RPMH_CXO_CLK>;
150        clock-names = "xo";
151
152        firmware-name = "qcom/sm8450/adsp.mbn";
153
154        interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>,
155                              <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>,
156                              <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>,
157                              <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>,
158                              <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>;
159        interrupt-names = "wdog", "fatal", "ready",
160                          "handover", "stop-ack";
161
162        memory-region = <&adsp_mem>;
163
164        power-domains = <&rpmhpd RPMHPD_LCX>,
165                        <&rpmhpd RPMHPD_LMX>;
166        power-domain-names = "lcx", "lmx";
167
168        qcom,qmp = <&aoss_qmp>;
169        qcom,smem-states = <&smp2p_adsp_out 0>;
170        qcom,smem-state-names = "stop";
171
172        glink-edge {
173            interrupts-extended = <&ipcc IPCC_CLIENT_LPASS
174                                         IPCC_MPROC_SIGNAL_GLINK_QMP
175                                         IRQ_TYPE_EDGE_RISING>;
176            mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>;
177
178            label = "lpass";
179            qcom,remote-pid = <2>;
180
181            /* ... */
182        };
183    };
184