1# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/remoteproc/qcom,sm6350-pas.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm SM6350 Peripheral Authentication Service 8 9maintainers: 10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 11 12description: 13 Qualcomm SM6350 SoC Peripheral Authentication Service loads and boots 14 firmware on the Qualcomm DSP Hexagon cores. 15 16properties: 17 compatible: 18 enum: 19 - qcom,sm6350-adsp-pas 20 - qcom,sm6350-cdsp-pas 21 - qcom,sm6350-mpss-pas 22 23 reg: 24 maxItems: 1 25 26 clocks: 27 items: 28 - description: XO clock 29 30 clock-names: 31 items: 32 - const: xo 33 34 qcom,qmp: 35 $ref: /schemas/types.yaml#/definitions/phandle 36 description: Reference to the AOSS side-channel message RAM. 37 38 memory-region: 39 maxItems: 1 40 description: Reference to the reserved-memory for the Hexagon core 41 42 smd-edge: false 43 44 firmware-name: 45 $ref: /schemas/types.yaml#/definitions/string 46 description: Firmware name for the Hexagon core 47 48required: 49 - compatible 50 - reg 51 - memory-region 52 53allOf: 54 - $ref: /schemas/remoteproc/qcom,pas-common.yaml# 55 - if: 56 properties: 57 compatible: 58 enum: 59 - qcom,sm6350-adsp-pas 60 - qcom,sm6350-cdsp-pas 61 then: 62 properties: 63 interrupts: 64 maxItems: 5 65 interrupt-names: 66 maxItems: 5 67 else: 68 properties: 69 interrupts: 70 minItems: 6 71 interrupt-names: 72 minItems: 6 73 74 - if: 75 properties: 76 compatible: 77 enum: 78 - qcom,sm6350-adsp-pas 79 then: 80 properties: 81 power-domains: 82 items: 83 - description: LCX power domain 84 - description: LMX power domain 85 power-domain-names: 86 items: 87 - const: lcx 88 - const: lmx 89 90 - if: 91 properties: 92 compatible: 93 enum: 94 - qcom,sm6350-cdsp-pas 95 then: 96 properties: 97 power-domains: 98 items: 99 - description: CX power domain 100 - description: MX power domain 101 power-domain-names: 102 items: 103 - const: cx 104 - const: mx 105 106 - if: 107 properties: 108 compatible: 109 enum: 110 - qcom,sm6350-mpss-pas 111 then: 112 properties: 113 power-domains: 114 items: 115 - description: CX power domain 116 - description: MSS power domain 117 power-domain-names: 118 items: 119 - const: cx 120 - const: mss 121 122unevaluatedProperties: false 123 124examples: 125 - | 126 #include <dt-bindings/clock/qcom,rpmh.h> 127 #include <dt-bindings/interrupt-controller/irq.h> 128 #include <dt-bindings/mailbox/qcom-ipcc.h> 129 #include <dt-bindings/power/qcom-rpmpd.h> 130 131 remoteproc@3000000 { 132 compatible = "qcom,sm6350-adsp-pas"; 133 reg = <0x03000000 0x100>; 134 135 clocks = <&rpmhcc RPMH_CXO_CLK>; 136 clock-names = "xo"; 137 138 interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, 139 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 140 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 141 <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 142 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 143 interrupt-names = "wdog", "fatal", "ready", 144 "handover", "stop-ack"; 145 146 memory-region = <&pil_adsp_mem>; 147 148 power-domains = <&rpmhpd SM6350_LCX>, 149 <&rpmhpd SM6350_LMX>; 150 power-domain-names = "lcx", "lmx"; 151 152 qcom,qmp = <&aoss_qmp>; 153 qcom,smem-states = <&smp2p_adsp_out 0>; 154 qcom,smem-state-names = "stop"; 155 156 glink-edge { 157 interrupts-extended = <&ipcc IPCC_CLIENT_LPASS 158 IPCC_MPROC_SIGNAL_GLINK_QMP 159 IRQ_TYPE_EDGE_RISING>; 160 mboxes = <&ipcc IPCC_CLIENT_LPASS 161 IPCC_MPROC_SIGNAL_GLINK_QMP>; 162 163 label = "lpass"; 164 qcom,remote-pid = <2>; 165 166 /* ... */ 167 }; 168 }; 169