1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: "http://devicetree.org/schemas/remoteproc/amlogic,meson-mx-ao-arc.yaml#" 5$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 7title: Amlogic Meson AO ARC Remote Processor bindings 8 9description: 10 Amlogic Meson6, Meson8, Meson8b and Meson8m2 SoCs embed an ARC core 11 controller for always-on operations, typically used for managing 12 system suspend. Meson6 and older use a ARC core based on the ARCv1 13 ISA, while Meson8, Meson8b and Meson8m2 use an ARC EM4 (ARCv2 ISA) 14 core. 15 16maintainers: 17 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 18 19properties: 20 compatible: 21 items: 22 - enum: 23 - amlogic,meson8-ao-arc 24 - amlogic,meson8b-ao-arc 25 - const: amlogic,meson-mx-ao-arc 26 27 firmware-name: 28 $ref: /schemas/types.yaml#/definitions/string 29 description: 30 The name of the firmware which should be loaded for this remote 31 processor. 32 33 reg: 34 description: 35 Address ranges of the remap and CPU control addresses for the 36 remote processor. 37 minItems: 2 38 39 reg-names: 40 items: 41 - const: remap 42 - const: cpu 43 44 resets: 45 minItems: 1 46 47 clocks: 48 minItems: 1 49 50 sram: 51 $ref: /schemas/types.yaml#/definitions/phandle 52 description: 53 phandles to a reserved SRAM region which is used as the memory of 54 the ARC core. The region should be defined as child nodes of the 55 AHB SRAM node as per the generic bindings in 56 Documentation/devicetree/bindings/sram/sram.yaml 57 58 amlogic,secbus2: 59 $ref: /schemas/types.yaml#/definitions/phandle 60 description: 61 A phandle to the SECBUS2 region which contains some configuration 62 bits of this remote processor 63 64required: 65 - compatible 66 - reg 67 - reg-names 68 - resets 69 - clocks 70 - sram 71 - amlogic,secbus2 72 73additionalProperties: false 74 75examples: 76 - | 77 remoteproc@1c { 78 compatible= "amlogic,meson8-ao-arc", "amlogic,meson-mx-ao-arc"; 79 reg = <0x1c 0x8>, <0x38 0x8>; 80 reg-names = "remap", "cpu"; 81 resets = <&media_cpu_reset>; 82 clocks = <&media_cpu_clock>; 83 sram = <&ahb_sram_ao_arc>; 84 amlogic,secbus2 = <&secbus2>; 85 }; 86 87... 88