1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Renesas R-Car PWM Timer Controller
8
9maintainers:
10  - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
11
12properties:
13  compatible:
14    items:
15      - enum:
16          - renesas,pwm-r8a7743   # RZ/G1M
17          - renesas,pwm-r8a7744   # RZ/G1N
18          - renesas,pwm-r8a7745   # RZ/G1E
19          - renesas,pwm-r8a77470  # RZ/G1C
20          - renesas,pwm-r8a774a1  # RZ/G2M
21          - renesas,pwm-r8a774b1  # RZ/G2N
22          - renesas,pwm-r8a774c0  # RZ/G2E
23          - renesas,pwm-r8a7778   # R-Car M1A
24          - renesas,pwm-r8a7779   # R-Car H1
25          - renesas,pwm-r8a7790   # R-Car H2
26          - renesas,pwm-r8a7791   # R-Car M2-W
27          - renesas,pwm-r8a7794   # R-Car E2
28          - renesas,pwm-r8a7795   # R-Car H3
29          - renesas,pwm-r8a7796   # R-Car M3-W
30          - renesas,pwm-r8a77961  # R-Car M3-W+
31          - renesas,pwm-r8a77965  # R-Car M3-N
32          - renesas,pwm-r8a77970  # R-Car V3M
33          - renesas,pwm-r8a77980  # R-Car V3H
34          - renesas,pwm-r8a77990  # R-Car E3
35          - renesas,pwm-r8a77995  # R-Car D3
36      - const: renesas,pwm-rcar
37
38  reg:
39    # base address and length of the registers block for the PWM.
40    maxItems: 1
41
42  '#pwm-cells':
43    # should be 2. See pwm.yaml in this directory for a description of
44    # the cells format.
45    const: 2
46
47  clocks:
48    # clock phandle and specifier pair.
49    maxItems: 1
50
51  power-domains:
52    maxItems: 1
53
54  resets:
55    maxItems: 1
56
57required:
58  - compatible
59  - reg
60  - '#pwm-cells'
61  - clocks
62
63additionalProperties: false
64
65examples:
66  - |
67    #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
68    #include <dt-bindings/power/r8a7743-sysc.h>
69
70    pwm0: pwm@e6e30000 {
71        compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
72        reg = <0xe6e30000 0x8>;
73        clocks = <&cpg CPG_MOD 523>;
74        power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
75        resets = <&cpg 523>;
76        #pwm-cells = <2>;
77        pinctrl-0 = <&pwm0_pins>;
78        pinctrl-names = "default";
79    };
80