1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pwm/renesas,pwm-rcar.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Renesas R-Car PWM Timer Controller 8 9maintainers: 10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 11 12properties: 13 compatible: 14 items: 15 - enum: 16 - renesas,pwm-r8a7742 # RZ/G1H 17 - renesas,pwm-r8a7743 # RZ/G1M 18 - renesas,pwm-r8a7744 # RZ/G1N 19 - renesas,pwm-r8a7745 # RZ/G1E 20 - renesas,pwm-r8a77470 # RZ/G1C 21 - renesas,pwm-r8a774a1 # RZ/G2M 22 - renesas,pwm-r8a774b1 # RZ/G2N 23 - renesas,pwm-r8a774c0 # RZ/G2E 24 - renesas,pwm-r8a774e1 # RZ/G2H 25 - renesas,pwm-r8a7778 # R-Car M1A 26 - renesas,pwm-r8a7779 # R-Car H1 27 - renesas,pwm-r8a7790 # R-Car H2 28 - renesas,pwm-r8a7791 # R-Car M2-W 29 - renesas,pwm-r8a7794 # R-Car E2 30 - renesas,pwm-r8a7795 # R-Car H3 31 - renesas,pwm-r8a7796 # R-Car M3-W 32 - renesas,pwm-r8a77961 # R-Car M3-W+ 33 - renesas,pwm-r8a77965 # R-Car M3-N 34 - renesas,pwm-r8a77970 # R-Car V3M 35 - renesas,pwm-r8a77980 # R-Car V3H 36 - renesas,pwm-r8a77990 # R-Car E3 37 - renesas,pwm-r8a77995 # R-Car D3 38 - const: renesas,pwm-rcar 39 40 reg: 41 # base address and length of the registers block for the PWM. 42 maxItems: 1 43 44 '#pwm-cells': 45 # should be 2. See pwm.yaml in this directory for a description of 46 # the cells format. 47 const: 2 48 49 clocks: 50 # clock phandle and specifier pair. 51 maxItems: 1 52 53 power-domains: 54 maxItems: 1 55 56 resets: 57 maxItems: 1 58 59required: 60 - compatible 61 - reg 62 - '#pwm-cells' 63 - clocks 64 - power-domains 65 66if: 67 not: 68 properties: 69 compatible: 70 contains: 71 enum: 72 - renesas,pwm-r8a7778 73 - renesas,pwm-r8a7779 74then: 75 required: 76 - resets 77 78additionalProperties: false 79 80examples: 81 - | 82 #include <dt-bindings/clock/r8a7743-cpg-mssr.h> 83 #include <dt-bindings/power/r8a7743-sysc.h> 84 85 pwm0: pwm@e6e30000 { 86 compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; 87 reg = <0xe6e30000 0x8>; 88 clocks = <&cpg CPG_MOD 523>; 89 power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; 90 resets = <&cpg 523>; 91 #pwm-cells = <2>; 92 pinctrl-0 = <&pwm0_pins>; 93 pinctrl-names = "default"; 94 }; 95