1af0ba001SPhilip, AvinashTI SOC based PWM Subsystem 2af0ba001SPhilip, Avinash 3af0ba001SPhilip, AvinashRequired properties: 4af0ba001SPhilip, Avinash- compatible: Must be "ti,am33xx-pwmss"; 5af0ba001SPhilip, Avinash- reg: physical base address and size of the registers map. 6af0ba001SPhilip, Avinash- address-cells: Specify the number of u32 entries needed in child nodes. 7af0ba001SPhilip, Avinash Should set to 1. 8af0ba001SPhilip, Avinash- size-cells: specify number of u32 entries needed to specify child nodes size 9af0ba001SPhilip, Avinash in reg property. Should set to 1. 10af0ba001SPhilip, Avinash- ranges: describes the address mapping of a memory-mapped bus. Should set to 11af0ba001SPhilip, Avinash physical address map of child's base address, physical address within 12af0ba001SPhilip, Avinash parent's address space and length of the address map. For am33xx, 13af0ba001SPhilip, Avinash 3 set of child register maps present, ECAP register space, EQEP 14af0ba001SPhilip, Avinash register space, EHRPWM register space. 15af0ba001SPhilip, Avinash 16af0ba001SPhilip, AvinashAlso child nodes should also populated under PWMSS DT node. 17af0ba001SPhilip, Avinash 18af0ba001SPhilip, AvinashExample: 19af0ba001SPhilip, Avinashpwmss0: pwmss@48300000 { 20af0ba001SPhilip, Avinash compatible = "ti,am33xx-pwmss"; 21af0ba001SPhilip, Avinash reg = <0x48300000 0x10>; 22af0ba001SPhilip, Avinash ti,hwmods = "epwmss0"; 23af0ba001SPhilip, Avinash #address-cells = <1>; 24af0ba001SPhilip, Avinash #size-cells = <1>; 25af0ba001SPhilip, Avinash status = "disabled"; 26af0ba001SPhilip, Avinash ranges = <0x48300100 0x48300100 0x80 /* ECAP */ 27af0ba001SPhilip, Avinash 0x48300180 0x48300180 0x80 /* EQEP */ 28af0ba001SPhilip, Avinash 0x48300200 0x48300200 0x80>; /* EHRPWM */ 29af0ba001SPhilip, Avinash 30af0ba001SPhilip, Avinash /* child nodes go here */ 31af0ba001SPhilip, Avinash}; 32