1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/pwm/mediatek,pwm-disp.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: MediaTek DISP_PWM Controller Device Tree Bindings 8 9maintainers: 10 - Jitao Shi <jitao.shi@mediatek.com> 11 - Xinlei Lee <xinlei.lee@mediatek.com> 12 13allOf: 14 - $ref: pwm.yaml# 15 16properties: 17 compatible: 18 oneOf: 19 - enum: 20 - mediatek,mt2701-disp-pwm 21 - mediatek,mt6595-disp-pwm 22 - mediatek,mt8173-disp-pwm 23 - mediatek,mt8183-disp-pwm 24 - items: 25 - const: mediatek,mt8167-disp-pwm 26 - const: mediatek,mt8173-disp-pwm 27 28 reg: 29 maxItems: 1 30 31 "#pwm-cells": 32 const: 2 33 34 clocks: 35 items: 36 - description: Main Clock 37 - description: Mm Clock 38 39 clock-names: 40 items: 41 - const: main 42 - const: mm 43 44required: 45 - compatible 46 - reg 47 - "#pwm-cells" 48 - clocks 49 - clock-names 50 51additionalProperties: false 52 53examples: 54 - | 55 #include <dt-bindings/interrupt-controller/arm-gic.h> 56 #include <dt-bindings/clock/mt8173-clk.h> 57 #include <dt-bindings/interrupt-controller/irq.h> 58 59 pwm0: pwm@1401e000 { 60 compatible = "mediatek,mt8173-disp-pwm"; 61 reg = <0x1401e000 0x1000>; 62 #pwm-cells = <2>; 63 clocks = <&mmsys CLK_MM_DISP_PWM026M>, 64 <&mmsys CLK_MM_DISP_PWM0MM>; 65 clock-names = "main", "mm"; 66 }; 67